AS7C33512PFS18A Ver la hoja de datos (PDF) - Alliance Semiconductor
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AS7C33512PFS18A Datasheet PDF : 20 Pages
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AS7C33512PFS18A
®
Timing characteristics for 2.5V I/O operation
Parameter
Clock frequency
Cycle time
Clock access time
Output enable LOW to data valid
Clock HIGH to output Low Z
Data output invalid from clock HIGH
Output enable LOW to output Low Z
Output enable HIGH to output High Z
Clock HIGH to output High Z
Output enable HIGH to invalid output
C. lock HIGH pulse width
C. lock LOW pulse width
Address setup to clock HIGH
Data setup to clock HIGH
Write setup to clock HIGH
Chip select setup to clock HIGH
Address hold from clock HIGH
Data hold from clock HIGH
Write hold from clock HIGH
Chip select hold from clock HIGH
ADV setup to clock HIGH
ADSP setup to clock HIGH
ADSC setup to clock HIGH
ADV hold from clock HIGH
ADSP hold from clock HIGH
ADSC hold from clock HIGH
1 See “Notes on page 17.
Snooze Mode Electrical Characteristics
Description
Current during Snooze Mode
ZZ active to input ignored
ZZ inactive to input sampled
ZZ active to SNOOZE current
ZZ inactive to exit SNOOZE current
Conditions
ZZ > VIH
Symbol
fMax
tCYC
tCD
tOE
tLZC
tOH
tLZOE
tHZOE
tHZC
tOHOE
tCH
tCL
tAS
tDS
tWS
tCSS
tAH
tDH
tWH
tCSH
tADVS
tADSPS
tADSCS
tADVH
tADSPH
tADSCH
–166
Min Max
– 166
6
–
- 4.0
– 3.5
0
–
1.5 –
0
–
– 3.5
– 3.5
0
–
2.4 –
2.3 –
1.7 –
1.7 –
1.7 –
1.7 –
0.7 –
0.7 –
0.7 –
0.7 –
1.7 –
1.7 –
1.7 –
0.7 –
0.7 –
0.7 –
–133
Min Max
– 133
7.5 –
- 4.5
– 4.0
0
–
1.5 –
0
–
– 4.0
– 4.0
0
–
2.5 –
2.5 –
1.7 –
1.7 –
1.7 –
1.7 –
0.7 –
0.7 –
0.7 –
0.7 –
1.7 –
1.7 –
1.7 –
0.7 –
0.7 –
0.7 –
Unit
MHz
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Notes1
2,3,4
2
2,3,4
2,3,4
2,3,4
5
5
6
6
6,7
6,8
6
6
6,7
6,8
6
6
6
6
6
6
Symbol
Min
ISB2
tPDS
2
tPUS
2
tZZI
tRZZI
0
Max
Units
30
mA
cycle
cycle
2
cycle
11/30/04; v.2.2
Alliance Semiconductor
11 of 20
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