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VV5801B001 Datasheet PDF : 23 Pages
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VISION V V6801 & VV5801 Sensors
High resolution CMOS 1300K Pixel Image Sensor with support
for external FPN cancellation and serial interface control, avail-
able in colour (VV6801) and monochrome (VV5801) versions.
PRELIMINARY CUSTOMER DATASHEET Revision 1.1
CHARACTERISTICS
• High resolution (1300K) CMOS sensor
designed for use in Digital Colour Stills Cam-
eras and Machine Vision applications
• External frame/line buffering schemes offer
effective pixel offset cancellation and low
noise operation
• Versatile operating modes, including ‘Live
• Bayer pattern R,G,B colourisation (other pat-
Video’ mode, Horizontal Cine mode, and new
Vertical Cine modes for viewfinder applica-
tions, as well as exposure monitoring modes
• Digital control of pixel reading for flexibility,
including external ADC interface
• Control/configuration via serial interface
GENERAL DESCRIPTION
terns/colours can be accommodated)
Monochrome version available - VV5801 -
functionally identical to the VV6801, but with
y higher sensitivity
Low power operation (125mW Typical)
r Industry standard 84 pin LCC and BGA pack-
ina ages
The VV5801 (monochrome) and VV6801 (colour) products
offer both high resolution and enhanced performance
levels.
The VV6801 colour sensor has been developed principally
lim to address the demands of the high resolution colour
Digital Stills camera market. It provides high colour fidelity
with low colour aliasing which is particularly relevant for
stills photography.
The VV5801 monochrome device is ideal for Machine
e Vision applications. The functionality of the sensor is
identical to the VV6801, with higher sensitivity.
r Control and readout timing requirements are similar and
pinout is backwardly compatable to the VV6850/5850
P 800K pixel sensors, giving ease of design into existing
‘Live Video’, and exposure monitoring modes. A choice of
Horizontal and Vertical subsampled ‘Cine’ modes are
available for increased framerate, ideal for viewfinder
applications.
Both the colour and monochrome devices are suited to
digital still capture and applications requiring digitisation of
the pixel output and post processing of the image in
hardware or software. The image quality from both
sensors can be enhanced by implementation of external
noise cancellation techniques, using external frame and
line buffering.
Exposure control can be achieved with or without an
electromechanical shutter. Both sensors benefit from a
pixel fill factor of more than 25%, which have resulted in
VV6850/5850 800K pixel applications. The VV6801 and improved sensitivity. A two way serial interface and control
VV5801 have an identical image array size to the VV6850/ register provides further control and monitoring of certain
5850, allowing for existing optics to be used.
camera functions.
All clocking and sequencing controls are used defined,
giving maximum flexibility of use. This gives a range of
versatile operating modes which can be implemented,
including high quality still image capture, full resolution
TECHNICAL SPECIFICATION
Image Format
Pixel Size
Active array Size
Sensitivity (colour)
S/N
1024 x 1280 pixels
8.4 x 8.4µm
8.60 x 10.75mm
50mV/lux @ 50ms exp.
Typically 66dB (with FPN can-
cellation)
Max. pixel rate
Power Supply
Power
Temperature
Package
10Mpix/s (5Mpix/s for 0.1% set-
tling)
5v ±5%
< 150 mW
0oC - 40oC
BGA or 84LCC
cd24082b.fm
09/09/98: PRELIMINARY
1
VISION VV6801/5801 PRELIMINARY CUSTOMER DATASHEET Rev 1.1
Table of Contents
1. General description ........................................................................................................................ 4
1.1 Sensor architecture ........................................................................................................................ 4
1.2 Typical application.......................................................................................................................... 4
1.3 Pixel array ...................................................................................................................................... 5
1.4 Video Output .................................................................................................................................. 5
1.5 Serial Interface ............................................................................................................................... 5
2. Architectural details ....................................................................................................................... 6
2.1 Sensor array................................................................................................................................... 6
2.2 Reset and Read Vertical Shift Registers ........................................................................................ 7
2.3 Horizontal Shift Register................................................................................................................. 8
2.4 Pixel Readout Architecture............................................................................................................. 9
y 2.5 Video Output .................................................................................................................................. 9
2.6 The Video Output Chain............................................................................................................... 10
r 2.7 AVO Reference ............................................................................................................................ 10
2.8 The 5-Bit DAC .............................................................................................................................. 11
a 2.9 Black Reference Lines ................................................................................................................. 12
3. Exposure Control.......................................................................................................................... 14
in 4. Removing Noise............................................................................................................................ 15
4.1 Sources of Fixed Pattern Noise.................................................................................................... 15
4.2 Methods of Removing Fixed Pattern Noise.................................................................................. 15
lim 5. Operating Modes .......................................................................................................................... 17
5.1 Still Image Capture with a Frame Buffer ...................................................................................... 17
5.2 Correlated Double Sampling (line by line).................................................................................... 18
5.3 Live-Video Mode .......................................................................................................................... 19
e 5.4 Cine Modes .................................................................................................................................. 20
5.5 Parallel Integration ....................................................................................................................... 21
r 5.6 Accumulate................................................................................................................................... 22
P 5.7 Multiple Dark Current Periods ...................................................................................................... 22
6. The Control Register & Serial Communication.......................................................................... 24
6.1 General description ...................................................................................................................... 24
6.2 Serial Communication Protocol .................................................................................................... 24
6.3 The Serial Data Word................................................................................................................... 25
6.4 Register description...................................................................................................................... 25
6.5 Control Register Definitions.......................................................................................................... 26
7. Detailed Operational Timing ........................................................................................................ 28
7.1 System Clocks.............................................................................................................................. 28
7.2 Line Start to PCK Timing.............................................................................................................. 28
7.3 Initial Power Up Timing ................................................................................................................ 28
7.4 Inter-Frame Timing....................................................................................................................... 29
7.5 Line Read-Out Timing .................................................................................................................. 30
7.6 Line Timing using CDSR .............................................................................................................. 34
8. Detailed Specifications ................................................................................................................ 37
8.1 Absolute Maximum Ratings.......................................................................................................... 37
8.2 DC Operating Conditions ............................................................................................................. 37
8.3 AC Operating Conditions.............................................................................................................. 37
8.4 Electrical Characteristics .............................................................................................................. 38
8.5 Video Output Characteristics........................................................................................................ 38
cd24082b.fm
09/09/98: PRELIMINARY
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