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SSD1854U Ver la hoja de datos (PDF) - Solomon Systech

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SSD1854U Datasheet PDF : 48 Pages
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enable
Oscillation Circuit
Oscillator
enable
enable
Buffer
(CL)
OSC1
Internal Resistor
OSCE
Figure 4 - Oscillator Circuitry
7.8 LCD Driving Voltage Generator and Regulator
This module generates the LCD voltage needed for display output. It takes a single supply input
and generates necessary bias voltages.
It consists of:
1. 3X, 4X and 5X DC-DC voltage converter:
The booster output at VCC equals to n time VCI where n is the booster ration. The VCC
voltage must be greater than 2V + VL4 or 2V + ½ VL7. Please refer to application notes
for details.
2. Voltage Regulator
Feedback gain control for initial LCD voltage. Internal resistors are connected between
VSS and VR (internal contrast voltage reference), and between VR and VL7. These
resistors are chosen to give the desired VL7 according to the following equation:
VL7
=
1 +
R2
R1

×
Vcon
and
Vcon
=
1
(63 α
210
)

×Vref
where:
Vref is the internally generated reference voltage
(1+R2/R1) is the software programmable IRS value
α is the software contrast level from 0 to 63
3. Bias Divider
There is an on-chip bias divider inside the chip selected by software which generate all
VL2~VL7 levels automatically.
4. Contrast Control
Software control of 64 voltage levels of LCD voltage.
5. Bias Ratio Selection circuitry
Software control of different bias ratios to match the characteristic of LCD panel.
6. Self adjust temperature compensation circuitry
Provide 4 different compensation grade selections to satisfy the various liquid crystal
temperature grades. The grading can be selected by software control. Defaulted
temperature coefficient (TC) value is -0.1%/°C.
7.9 288 Bit Latch
A register carries the display signal information. In 128 X 160 display-mode, data will be fed to
the HV-buffer Cell and level-shifted to the required level.
13
SSD1854
Series
Rev 1.0
08/2002
SOLOMON

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