SSD1730 Ver la hoja de datos (PDF) - Solomon Systech

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SSD1730

SSD1730 MLA Power Chip CMOS

Solomon Systech  

7. PIN DESCRIPTION

Key:

I =Input

O =Output

I/O = Bi-Directional (Input/Output)

P = Power pin

NC = Dummy pin

Pin Name

VDD_PWR

VSS

Type

P

P

Pin#

17, 29 &36

5, 15, 22, 31 & 41

Table 3 - Power Supply Pins

Description

Power supply pin

Ground pin

Pin Name

L0 to L3

FR

XFR

Type

I

O

Pin#

37 to 40

43

O

44

Table 4 - Pins for frame signal generator

Description

These input pins are used to set the polarity

reversal interval ranging from 2P to 17P.

This is an output pin and the FR signal is

generated from the LCD polarity reverse signal

generator.

This is an output pin and the XFR signal is also

generated from the LCD polarity reverse signal

generator. This signal is a reverse phase from FR

signal.

Pin Name

LP

Type

I

Pin#

42

XSLP

I

45

Table 5 - Pins for clock signal generator

Description

This input pin is used to generate the charge pump

clock and the polarity reverse signal FR and XFR.

A pulse signal with a period of 1P should be fed

into this pin.

This input pin is used to switch on or off the

display. When it is set to VSS level, the clock and

the operations of the voltage converter will be stop.

The display will be off. When it is set to VDD_PWR

level, the display will be on.

5

SSD1730

Rev 2.0

04/2002

SOLOMON

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