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ATA01504 Ver la hoja de datos (PDF) - ANADIGICS

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ATA01504
Anadigics
ANADIGICS Anadigics
ATA01504 Datasheet PDF : 8 Pages
1 2 3 4 5 6 7 8
ATA01504
APPLICATION INFORMATION
V
CAGC
Figure 3: ATA 01504D1C Typical Bonding Diagram
Power supplies and general layout considerations
The ATA01504D1C may be operated from a positive
supply as low as +4.5 V and as high as +6.0 V. Below
+4.5 V, bandwidth, overload and sensitivity will
degrade, while at +6.0 V, bandwidth, overload and
sensitivity. Use of surface mount (preferably MIM type
capacitors), low inductance power supply bypass
capacitors (>=56pF) are essential for good high
frequency and low noise performance. The power
supply bypass capacitors should be mounted on or
connected to a good low inductance ground plane.
General layout considerations
Since the gain stages of the transimpedance
amplifier have an open loop bandwidth in excess of
1.0 GHz, it is essential to maintain good high
frequency layout practices. To prevent oscillations, a
low inductance RF ground plane should be made
available for power supply bypassing. Traces that
can be made short should be made short, and the
utmost care should be taken to maintain very low
capacitance at the photodiode TIA interface (IIN), as
excess capacitance at this node will cause a
degradation in bandwidth and sensitivity (see
Bandwidth vs. CT curves).
210
200
B(3dB) A/ 2 π Rf (Cin +Ct)
190
VDD = 5.5 V
180
VDD = 5.0 V
170
160 VDD = 4.5 V
150
0 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6
CT(pF)
Figure 4: Bandwidth vs. CT
Note: All performance curves are typical @ TA =25 °C
unless otherwise noted.
4
PRELIMINARY DATA SHEET - Rev 1
08/2001

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