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74LVCH16374ABQ Datasheet PDF : 19 Pages
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NXP Semiconductors
74LVC16374A; 74LVCH16374A
16-bit edge-triggered D-type flip-flop; 5 V tolerant; 3-state
10. Dynamic characteristics
Table 7. Dynamic characteristics
Voltages are referenced to GND (ground = 0 V). For test circuit see Figure 10.
Symbol Parameter
Conditions
−40 °C to +85 °C
Min Typ[1] Max
tpd
propagation
nCP to nQn; see Figure 7
delay
VCC = 1.2 V
[2]
-
14
-
VCC = 2.7 V
1.5
-
6.0
VCC = 3.0 V to 3.6 V
ten
enable time
nOE to nQn; see Figure 9
1.5 3.4 5.4
[2]
VCC = 1.2 V
-
20
-
VCC = 2.7 V
1.5
-
6.0
VCC = 3.0 V to 3.6 V
tdis
disable time
nOE to nQn; see Figure 7
1.0 3.5 5.2
[2]
VCC = 1.2 V
-
12
-
VCC = 2.7 V
1.5
-
5.1
VCC = 3.0 V to 3.6 V
1.5 3.9 4.9
tW
pulse width
nCP HIGH; see Figure 7
VCC = 1.2 V
-
-
-
VCC = 2.7 V
3.0
-
-
VCC = 3.0 V to 3.6 V
3.0 1.5
-
tsu
set-up time
nDn to nCP; see Figure 8
VCC = 1.2 V
-
-
-
VCC = 2.7 V
1.9
-
-
VCC = 3.0 V to 3.6 V
1.9 0.3
-
th
hold time
nDn to nCP; see Figure 8
VCC = 1.2 V
-
-
-
VCC = 2.7 V
1.1
-
-
VCC = 3.0 V to 3.6 V
1.5 −0.3
-
fmax
maximum
frequency
see Figure 7
VCC = 2.7 V
80
-
-
tsk(o)
output skew
time
VCC = 3.0 V to 3.6 V
VCC = 3.0 V to 3.6 V
100 150
-
[3]
-
-
1.0
−40 °C to +125 °C Unit
Min
Max
-
- ns
1.5
7.5 ns
1.5
7.0 ns
-
- ns
1.5
7.5 ns
1.0
6.5 ns
-
- ns
1.5
6.5 ns
1.5
6.5 ns
-
- ns
3.0
- ns
3.0
- ns
-
- ns
1.9
- ns
1.9
- ns
-
- ns
1.1
- ns
1.5
- ns
80
- MHz
100
- MHz
-
1.5 ns
[1] Typical values are measured at Tamb = 25 °C and VCC = 1.2 V, 2.7 V, and 3.3 V respectively.
[2] tpd is the same as tPLH and tPHL.
ten is the same as tPZL and tPZH.
tdis is the same as tPLZ and tPHZ.
[3] Skew between any two outputs of the same package switching in the same direction. This parameter is guaranteed by design.
74LVC_LVCH16374A_7
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 07 — 23 March 2010
© NXP B.V. 2010. All rights reserved.
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