TA2021B Ver la hoja de datos (PDF) - Tripath Technology Inc.

Número de pieza

componentes Descripción

Fabricante

TA2021B

STEREO 25W (4Ω) CLASS-T™ DIGITAL AUDIO AMPLIFIER DRIVER USING DIGITAL POWER PROCESSING (DPP™) TECHNOLOGY

Tripath Technology Inc. 

Tripath Technology, Inc. - Technical Information

Pin Description

Pin

2, 3

4, 9

5, 8,

17

6

7

10, 14

11, 15

12

16

18

19

20, 35

22

24, 27;

31, 28

25, 26,

29, 30

13, 21,

23, 32,

34

33

36

1

Function

DCAP2, DCAP1

V5D, V5A

AGND1, AGND2,

AGND3

REF

OVERLOADB

OAOUT1, OAOUT2

INV1, INV2

MUTE

BIASCAP

SLEEP

FAULT

PGND2, PGND1

DGND

OUTP2 & OUTM2;

OUTP1 & OUTM1

VDD2, VDD2

VDD1, VDD1

NC

Description

Charge pump switching pins. DCAP1 (pin 3) is a free running 300kHz square

wave between VDDA and DGND (12Vpp nominal). DCAP2 (pin 2) is level shifted

10 volts above DCAP1 (pin 3) with the same amplitude (12Vpp nominal),

frequency, and phase as DCAP1.

Digital 5VDC, Analog 5VDC

Analog Ground

Internal reference voltage; approximately 1.0 VDC.

A logic low output indicates the input signal has overloaded the amplifier.

Input stage output pins.

Single-ended inputs. Inputs are a “virtual” ground of an inverting op-amp with

approximately 2.4VDC bias.

When set to logic high, both amplifiers are muted and in idle mode. When low

(grounded), both amplifiers are fully operational. If left floating, the device stays in

the mute mode. This pin should be tied to GND if not used.

Input stage bias voltage (approximately 2.4VDC).

When set to logic high, device goes into low power mode. If not used, this pin

should be grounded

A logic high output indicates thermal overload, or an output is shorted to ground,

or another output.

Power Grounds (high current)

Digital Ground

Bridged outputs

Supply pins for high current H-bridges.

Not connected. Not bonded internally.

VDDA

CPUMP

5VGEN

Supply pin for analog section.

Charge pump output (nominally 10V above VDDA)

Regulated 5VDC source used to supply power to the input section (pins 4 and 9).

TA2021B Pinout

36-pin Slug-Up SOP Package

(Top View)

CPUMP

36

PGND1

35

NC

34

VDDA

33

NC

32

OUTP1

31

VDD1

30

VDD1

29

OUTM1

28

OUTM2

27

VDD2

26

VDD2

25

OUTP2

24

NC

23

DGND

22

NC

21

PGND2

20

FAULT

19

1

+5VGEN

2

DCAP2

3

DCAP1

4

V5D

5

AGND1

6

REF

7

OVERLOADB

8

AGND2

9

V5A

10

OAOUT1

11

INV1

12

MUTE

13

NC

14

OAOUT2

15

INV2

16

BIASCAP

17

AGND3

18

SLEEP

4

TA2021B – 3.0/04.03

Share Link: