SC2596 Ver la hoja de datos (PDF) - Unspecified

Número de pieza

componentes Descripción

Fabricante

SC2596

Low Voltage Integrated DDR Termination Regulator

Unspecified 

POWER MANAGEMENT

Application Information (Cont.)

Layout guidelines

1) The EDP SO-8 package of SC2596 can improve the

thermal impedance (θJC) significantly. A suitable thermal

pad should be add when PCB layout. Some thermal vias

are required to connect the thermal pad to the PCB

ground layer. This will improve the thermal performance.

Please refer to the recommanded landing pattern.

2) To increase the noise immunity, a ceramic capacitor

of 100nF is required to decouple the VREF pin with the

shortest connection trace.

3) To reduce the noise on input power rail for standard

SSTL-2 application, a 100µF low ESR capacitor and a

1µF ceramic capacitor capacitor have to be used on the

input power rail with shortest possible connection.

4) VTT output copper plane should be as large as

possible. A 4.7uF to 10µF capacitor have to be used to

decouple the VTT pin.

5) The trace between VSENSE pin and VTT rail should be

as short as possible and put a 10nF ~100nF capacitor

close this vsense pin.

SC2596

© 2007 Semtech Corp.

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