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MN1030

MICROCOMPUTER

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Table of Contents

Chapter 1 Overview

1 Instruction Set ................................................................................................................... 2

2 Register Set ....................................................................................................................... 3

2.1 Data Register ......................................................................................................... 4

2.2 Address Registers .................................................................................................. 4

2.3 Stack Pointer ......................................................................................................... 4

2.4 Program Counter ................................................................................................... 4

2.5 Multiply/Divided Register .................................................................................... 4

2.6 Processor Status Word ........................................................................................... 5

2.7 Loop Instruction Register ...................................................................................... 6

2.8 Loop Address Register .......................................................................................... 6

3 Instruction Functions ........................................................................................................ 7

3.1 Data Transfer Instructions ..................................................................................... 8

3.2 Arithmetic Instructions .......................................................................................... 8

3.3 Compare Instructions ............................................................................................ 9

3.4 Bitwise Logical Instructions ................................................................................. 9

3.5 Bit Manipulation Instructions ............................................................................... 9

3.6 Shift Instructions ................................................................................................... 9

3.7 Branch Instructions ............................................................................................. 10

3.8 NOP Instruction ................................................................................................... 10

3.9 User Defined Instructions ................................................................................... 10

4 Memory Layout .............................................................................................................. 11

5 Addressing Modes .......................................................................................................... 14

5.1 Register Direct Addressing ................................................................................. 16

5.2 Immediate Addressing ......................................................................................... 16

5.3 Register Indirect Addressing ............................................................................... 16

5.4 Register Relative Indirect Addressing ................................................................. 17

5.5 Absolute Addressing ........................................................................................... 18

5.6 Register Indirect Addressing with Indexing ........................................................ 18

6 Instruction Formats ......................................................................................................... 19

6.1 Data Formats ....................................................................................................... 20

6.2 Byte Order ........................................................................................................... 21

Chapter 2 Instruction Specifications

Symbol Definitions ......................................................................................................... 24

Data Transfer Instructions

MOV

MOV

MOV

MOV

Reg1,Reg2 ................................................................................................ 26

Mem,Reg .................................................................................................. 27

Reg,Mem .................................................................................................. 28

imm,Reg ................................................................................................... 29

<TOC 1>

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