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INIC-1511 Ver la hoja de datos (PDF) - Unspecified

Número de pieza
componentes Descripción
Fabricante
INIC-1511
ETC
Unspecified ETC
INIC-1511 Datasheet PDF : 26 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
INIC-1511 (Preliminary)
4
wIndex
2
0x00
5
0x00
6
wLength
2
0x01
7
0x00
Don’t care
Don’t care
READ_CHIP_ID setup packet format is:
Offset
0
1
2
3
4
5
6
7
Field
Size
bmReqType 1
bReq
1
wValue
2
wIndex
2
wLength
2
Value
0xc0
0x03
0x00
0x00
0x00
0x00
0x04
0x00
Data
Chip-ID
0x11,
0x15,
0xc9,
0x25
Description
Vendor read
Don’t care
Don’t care
HOLD_CPU setup packet format is:
Offset
0
1
2
3
4
5
6
7
Field
Size
bmReqType 1
bReq
1
wValue
2
wIndex
2
wLength
2
Value
0x40
0x04
0x00
0x00
0x00
0x00
0x00
0x00
Description
Vendor write
HOLD_CPU
Don’t care
Don’t care
Don’t care
Don’t care
Don’t care
4.5 NVRAM Download from USB cable
The download utility may read/write NVRAM through access I2C registers similar as CPU does.
1. Host send READ_CHIP_ID packet through control channel to read chip-ID, which is
0x29C5_1511 here. Default hardware report PID is 0x1518.
2. Host send HOLD_CPU packet through control channel to set HOLD_CPU bit.
4.5.1 NVRAM Write.
3. Host send DATA_WRITE packet with wValue I2C_Addr(0x40E0) and wIndex[15:8] the
NVRAM address to be accessed
4. Host send DATA_WRITE packet with wValue I2C_Data(0x40E1) and wIndex[15:8] the value to
be write to NVRAM
5. Host send DATA_WRITE packet with wValue I2C_Ctrl(0x40E2) and wIndex[15:8] the Control
Code to be write to NVRAM
6. Host send DATA_WRITE packet with wValue I2C_Comm(0x40E3) and wIndex[15:8] the Run
bit[b7] and read/write direction 0 [b0]
Initio Corporation Confidential
10

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