MT6323GA Ver la hoja de datos (PDF) - MediaTek Inc
Número de pieza
componentes Descripción
Fabricante
MT6323GA Datasheet PDF : 14 Pages
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Ball
Symbol
D3 AVDD28_AUXADC
D5 RTC_32K1V8
D6 SIM2_AP_SRST
D8 SPI_MOSI
D9 SPI_CLK
E1 CLK26M
E10 ISINK2
E11 GND_VPROC
E13 GND_VPA
E14 VPROC
E2 ACCDET
E4 AU_VIN0_P
E6 SIM1_AP_SRST
E7 AUD_MOSI
E8 AUD_CLK
E9 ISINK0
F10 GND_VPROC
F11 GND_VPROC
F13 VBAT_VPROC
F14 VBAT_VPROC
F2 AU_MICBIAS0
F4 AU_VIN0_N
F5 GND_LDO
F6 GND_LDO
F7 GND_LDO
F8 GND_LDO
F9 GND_LDO
G1 AU_HSN
G11 GND_VSYS
G13 VBAT_VPROC
G2 AU_MICBIAS1
G3 AU_VIN1_P
G4 AU_VIN1_N
G5 GND_LDO
G6 GND_LDO
G7 GND_LDO
G8 GND_LDO
MT6323
PMIC Technical Brief
Confidential A
I/O
PWR
O
I
IO
I
I
O
GND
GND
O
I
I
I
I
I
O
GND
GND
PWR
PWR
PWR
I
GND
GND
GND
GND
GND
O
GND
PWR
PWR
I
I
GND
GND
GND
GND
Description
2.8V power input for AUXADC
VIO18 domain 32kHz clock output
AP/PMIC SIM2 SRST
SPI interface's serial data signal. Default is
input only.
SPI interface's clock
26MHz CLK
Current sink channel 2 output
Ground of VPROC
Ground of VPA
SW node of VPROC
Accessory detection input
Analog input 1 positive
AP/PMIC SIM1 SRST
Downlink DAC serial data
26M clock (can be hopping)
Current sink channel 0 output
Ground of VPROC
Ground of VPROC
Battery power supply input of VPROC
Battery power supply input of VPROC
Microphone bias for main and 2nd microphone
Analog input 1 negative
Ground for LDO
Ground for LDO
Ground for LDO
Ground for LDO
Ground for LDO
Receiver output
Ground of VSYS BUCK
Battery power supply input of VPROC
Microphone vias for earphone
Analog input 2 positive
Analog input 2 negative
Ground for LDO
Ground for LDO
Ground for LDO
Ground for LDO
MediaTek Confidential
© 2013 MediaTek Inc.
This document contains information that is proprietary to MediaTek Inc.
Unauthorized reproduction or disclosure of this information in whole or in part is strictly prohibited.
Page 8 of 14
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