FT232BM Ver la hoja de datos (PDF) - Future Technology
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FT232BM Datasheet PDF : 25 Pages
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FT232BM USB UART ( USB - Serial) I.C.
• x8 Clock Multiplier
of the data on the RS232 (RS422 and RS485)
The x8 Clock Multiplier takes the 6MHz input
interface. Control signals supported by the UART
from the Oscillator cell and generates a 12MHz
include RTS, CTS, DSR , DTR, DCD and RI.
reference clock for the SIE, USB Protocol Engine
The UART provides a transmitter enable control
and UART FIFO controller blocks. It also generates
signal (TXDEN) to assist with interfacing to
a 48MHz reference clock for the USB DPPL and
RS485 transceivers. The UART supports RTS/
the Baud Rate Generator blocks.
CTS, DSR/DTR and X-On/X-Off handshaking
options. Handshaking, where required, is handled
• Serial Interface Engine (SIE)
in hardware to ensure fast response times. The
The Serial Interface Engine (SIE) block performs
UART also supports the RS232 BREAK setting
the Parallel to Serial and Serial to Parallel
and detection conditions.
conversion of the USB data. In accordance to the
USB 2.0 specification, it performs bit stuffing / un- • Baud Rate Generator
stuffing and CRC5 / CRC16 generation / checking
The Baud Rate Generator provides a x16 clock
on the USB data stream.
input to the UART from the 48MHz reference clock
and consists of a 14 bit prescaler and 3 register
• USB Protocol Engine
bits which provide fine tuning of the baud rate
The USB Protocol Engine manages the data
(used to divide by a number plus a fraction). This
stream from the device USB control endpoint. It
determines the Baud Rate of the UART which is
handles the low level USB protocol (Chapter 9)
programmable from 183 baud to 3 million baud.
requests generated by the USB host controller
and the commands for controlling the functional
• RESET Generator
parameters of the UART.
The Reset Generator Cell provides a reliable
power-on reset to the device internal circuitry
• Dual Port TX Buffer (128 bytes)
on power up. An additional RESET# input and
Data from the USB data out endpoint is stored
RSTOUT# output are provided to allow other
in the Dual Port TX buffer and removed from the
devices to reset the FT232BM or the FT232BM
buffer to the UART transmit register under control
to reset other devices respectively. During reset,
of the UART FIFO controller.
RSTOUT# is driven low, otherwise it drives out
at the 3.3V provided by the onboard regulator.
• Dual Port RX Buffer (384 bytes)
RSTOUT# can be used to control the 1.5k
Data from the UART receive register is stored in
pull-up on USBDP directly where delayed USB
the Dual Port RX buffer prior to being removed by
enumeration is required. It can also be used to
the SIE on a USB request for data from the device
reset other devices. RSTOUT# will stay high-
data in endpoint.
impedance for approximately 5ms after VCC
has risen above 3.5V AND the device oscillator is
• UART FIFO Controller
running AND RESET# is high. RESET# should
The UART FIFO controller handles the transfer of
be tied to VCC unless it is a requirement to reset
data between the Dual Port RX and TX buffers and
the device from external logic or an external reset
the UART transmit and receive registers.
generator i.c.
• UART
The UART performs asynchronous 7 / 8 bit
Parallel to Serial and Serial to Parallel conversion
DS232B Version 1.8 © Future Technology Devices Intl. Ltd. 2005
Page 6 of 25
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