SPT561 Ver la hoja de datos (PDF) - Signal Processing Technologies
Número de pieza
componentes Descripción
Fabricante
SPT561 Datasheet PDF : 12 Pages
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recognize that [taking Vi positive]
Vo = V− + Gierr Rf
solving for V− from two directions
V− = Vi − ierr Ri = (G + 1) ierr Rg
solving for ierr from this
ierr
=
Vi
(G + 1) Rg
+ Ri
then
V−
=
Vi
−
Vi Ri
(G + 1) Rg
+ Ri
and, substituting for V−and ierr in the original Vo expression
Vo
= Vi
1+
GRf − Ri
(G + 1) Rg +
Ri
pulling an Rf out of the fraction
Rg
Av
≡
Vo
Vi
= 1+ Rf
Rg
G − Ri
Rf
G
+
1+
Ri
Rg
note that Av
=
1+
Rf
Rg
G
G+
1
Ri = 0
Figure 4: Voltage Gain Derivation
Note again that if Ri = 0 this expression would simplify
considerably. Also, if G were very large the voltage gain
expression would reduce to the familiar non-inverting op
amp gain equation. These two performance equations,
shown below, provide a means to derive the design
equations for Rf and Rg given a desired no load gain and
output impedance. The details of that derivation may be
found in Application Note SPT-01.
Performance Equations
Ro
=
Rf
+
Ri
1+
Rf
Rg
G + 1+ Ri
Rg
Av
= 1+ Rf
Rg
G − Ri
Rf
G
+
1+
Ri
Rg
Design Equations
Rf = (G + 1) Ro − Av Ri
Rg
=
Rf − Ro
Av −1
Equivalent Model
Given that the physical feedback and gain setting
resistors have been determined in accordance with the
design equations shown above, an equivalent model may
be created for the gain to the load where the amplifier block
is taken as a standard op amp. Figure 5 shows this analysis
model and the resulting gain equation to the load.
Vi
+
Classical
op-amp
-
Rf - Ro
Ro
Vo
RL
Rg
Vo
Vi
=
1+
Rf − Ro
Rg
RL
RL + Ro
substituting in for Rf and Rg with their design
equation yields
Vo
Vi
=
Av
RL
RL + Ro
=
AL
(gain to load)
Figure 5: Equivalent Model
This model is used to generate the DC error and noise
performance equations. As with any equivalent model, the
primary intent is to match the external terminal characteris-
tics recognizing that the model distorts the internal currents
and voltages. In this case, the model would incorrectly
predict the output pin voltage swing for a given swing at the
load. But it does provide a simplified means of getting to the
external terminal characteristics.
External Compensation Capacitor (Cx)
As shown in the test circuit of Figure 1, the SPT561 requires
an external compensation capacitor from the output to pin
19. The recommended values described here assume that a
maximally flat frequency response into a matched load is
desired. The required Cx varies widely with the desired value
of output impedance and to a lesser degree on the desired
gain. Note from Figure 2, the simplified internal schematic,
that the actual total compensation (Ct) is the series combi-
nation of Cx and the internal 10pF from pin 19 to the
compensation nodes. With this total value derived, the
required external Cx is developed by backing out the effect
of the internal 10pF. The total compensation (Ct) is devel-
oped in two steps as shown below.
C1
=
300
Ro
1−
2.0
Rg
pF intermediate equation
Ct
=
1+
C1
(0.02)
C1
pF total compensation
SPT561
8
10/9/98
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