SPT561 Ver la hoja de datos (PDF) - Signal Processing Technologies

Número de pieza

componentes Descripción

Fabricante

SPT561

WIDEBAND, LOW DISTORTION DRIVER AMPLIFIER

Signal Processing Technologies 

the impact internal amplifier characteristics have on the

signal gain. Both the output DC error and noise model

may be developed using the equivalent model of Figure

5. Generally, non-inverting input errors show up at the

output with the same gain as the input signal, while the

inverting current errors have a gain of simply (Rf - Ro) to

the output voltage (neglecting the Ro to RL attenuation).

Output DC Offset:

The DC error terms shown in the specification listing

along with the model of Figure 5 may be used to estimate

the output DC offset voltage and drift. Each term shown

in the specification listing can be of either polarity. While

the equations shown below are for output offset voltage,

the same equation may be used for the drift with each

term replaced by its temperature drift value shown in the

specification listing.

Vos

=

(Ibn

⋅Rs

±

Vio

)

⋅



1+

Rf − Ro

Rg





±

Ibi

(Rf

− Ro)

where: Ibn ≡ non − inverting bias current

Ibi ≡ inverting bias current

Vio ≡ input offset voltage

An example calculation for the circuit in Figure 1 using

typical 25°C DC error terms and Rs = 25Ω, RL = 50Ω

yields:

[ ] Vo = (5µA ⋅ 25Ω ± 2.0mV) 10 ± 10µA (360Ω) L

DC

1/ 2 = ±12.4mV

↑

attentuation between Ro and RL

Recall that the source impedance, Rs, includes both the

terminating and signal source impedance and that the

actual DC level to the load includes the voltage divider

between Ro and RL. Also note that for the SPT561, as

well as for all current feedback amplifiers, the non-inverting

and inverting bias currents do not track each other in

either magnitude or polarity. Hence, there is no meaning

in an offset current specification, and source impedance

matching to cancel bias currents is ineffective.

Noise Analysis:

Although the DC error terms are in fact random, the

calculation shown above assumes they are all additive in

a worst case sense. The effect of all the various noise

sources are combined as a root sum of squared terms to

get an overall expression for the spot noise voltage. The

circuit of Figure 8 shows the equivalent circuit with all the

various noise voltages and currents included along with

their gains to the output.

Rs

√4kTRs *

√4kT

Rg

*

*eni

* ini

* ii Rg

+

Classical

op-amp

-

√4kT(Rf - Ro)

* Rf - Ro

√4kTRVo

*

e

Ro

where:

eni – non-inverting input voltage noise

ini – non-inverting input current noise

ii – inverting input current noise

4kTRs − source resis tance voltage

noise

Gain to eo

Av

AvRs

Rf - Ro

Av

4kT / Rg − gain settling resistor

noise current

Rf - Ro

4kT(Rf − Ro ) − feedback resistor

1

voltage noise

4kTRo − output resistor voltage noise

1

Figure 8: Equivalent Noise Model

To get an expression for the equivalent output noise voltage,

each of these noise voltage and current terms must be

taken to the output through their appropriate gains and

combined as the root sum of squares.

( ) ( ) ( ) eo = eni2 + iniRs 2 + 4kTRs Av2 + ii2 Rf − Ro 2 L

+ 4kT (Rf − Ro ) Av + 4kTRo

Where the 4kT(Rf - Ro) Av term is the combined noise power

of Rg and Rf - Ro.

It is often more useful to show the noise as an equivalent

input spot noise voltage where every term shown above is

reflected to the input. This allows a direct measure of the

input signal to noise ratio. This is done by dividing every

term inside the radical by the signal voltage gain squared.

This, and an example calculation for the circuit of Figure 1,

are shown below. Note that RL may be neglected in this

calculation.

( ) ( ) en =

eni2 +

iniRs

2 + 4kTRs + ii2

Rf − Ro

Av2

2

+L

4kT

(Rf −

Av

Ro )

+

4kTRo

Av2

SPT561

10

10/9/98

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