SA9401 Ver la hoja de datos (PDF) - South African Micro Electronic Systems
Número de pieza
componentes Descripción
Fabricante
SA9401 Datasheet PDF : 16 Pages
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PIN DESCRIPTION (Continued)
Pin No
37, 36, 35, 33,
I/0 Designation
I
D0..D7
32, 31, 30, 29
9, 14, 19
I
PS0, PS1,
PS2
7 O CLKDIV2
40
I
CLK_SEL
28
I
38
I
16
I
17
I
18 O
BLOCK DIAGRAM
TEST
MRST
WD_RST
WD_EN
WD_INT
SA9401
Description
EPROM Data Lines
Program Select Inputs for Selecting
between 1 of 8 tone plans
CLKIN divided by 2 output (i.e. 4096 kHz or 1024
kHz depending on CLK_SEL input)
Selects between CKLIN of 8192 or 2048 kHz and
Synchronisation source.
0 = 8192kHz/Internal
1 = 2048kHz/External
Used for IC testing purpose. Tied Low during
normal operation.
Asynchronous Reset Pin. Resets all Internal Flip
Flops (active low)
Watchdog reset input (Rising-edge triggered) Tied
high if unused
Watchdog enable input (active low) Tied high if
unused
Watchdog output (active low, tri-state)
/MRST
CLK_SEL
CLKIN
WD_RST
WDENB
D[7 : 0]
CLOCK
GENERATOR
WATCHDOG
TIMER
INTRUDE
TONE
GENERATOR
CLKDIV2
2MCLK
8KFS
PCMFSC
WD_INT
INTRFRQ
/FS1
CADENCE
INTRCAD
TIMER
PS[2 : 0]
EPROM
INTERFACE
A[13 : 0]
TEST
SA9401
DR-01085
sames
PCM
INTERFACE
PCM_OU
3
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