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ST70137 Ver la hoja de datos (PDF) - STMicroelectronics

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ST70137 Datasheet PDF : 22 Pages
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ST70137
PCI Clock Waveform 5V
2.0V
1.5V
0.8V
PCI Clock Waveform 3.3V
0.5VDD
0.4VDD
0.3VDD
2.4V
Th
Tc
0.6VDD
Th
Tc
0.4V
TI
0.2VDD
TI
PCI Timings
Symbol
Parameter
Minimum Typical Maximum Units
Tval Clock to Signal Valid Delay (bused signals)
Tval(ptp) Clock to Signal Valid Delay (point to point)
Ton Float to Active Delay
Toff Active to Float Delay
Tsu Input Set up Time to Clock (bused signals)
Tsu(ptp) Input Set up Time to Clock (point to point) *
Th
Input Hold Time from Clock
Trst Reset Active Time after Power Stable
Trst-clk Reset Active Time after CLK Stable **
Trst-off Reset Active to Output Float Delay **
2
2
2
7
10, 12 *
0
1
100
11
ns
12
ns
ns
28
ns
ns
ns
ns
ms
µs
40
ns
* PCI REQN and GNTN are point-to-point signals and have different output valid delay and input setupt times than do bused signals. REQN
has set up of 12ns and GNTN of 10ns. All other signals are bused.
** Guaranted by design.
18/22

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