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RF3110 Datasheet PDF : 12 Pages
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Preliminary
Noise power in PA's where output power is controlled
by changing the bias voltage is often a problem when
backing off of output power. The reason is that the gain
is changed in all stages and according to the noise for-
mula (Equation 5),
FTOT
=
F
1
+
F----2-----–-----1-
G1
+
--F----3-----–-----1---
G1 ⋅ G2
(Eq. 5)
the noise figure depends on noise factor and gain in all
stages. Because the bias point of the RF3110 is kept
constant the gain in the first stage is always high and
the overall noise power is not increased when decreas-
ing output power.
Power control loop stability often presents many chal-
lenges to transmitter design. Designing a proper power
control loop involves trade-offs affecting stability, tran-
sient spectrum and burst timing.
In conventional architectures the PA gain (dB/ V) varies
across different power levels, and as a result the loop
bandwidth also varies. With some power amplifiers it is
possible for the PA gain (control slope) to change from
100dB/V to as high as 1000dB/V. The challenge in this
scenario is keeping the loop bandwidth wide enough to
meet the burst mask at low slope regions which often
causes instability at high slope regions.
The RF3110 loop bandwidth is determined by internal
bandwidth and the RF output load and does not
change with respect to power levels. This makes it eas-
ier to maintain loop stability with a high bandwidth loop
since the bias voltage and collector voltage do not vary.
An often overlooked problem in PA control loops is that
a delay not only decreases loop stability it also affects
the burst timing when, for instance the input power
from the VCO decreases (or increases) with respect to
temperature or supply voltage. The burst timing then
appears to shift to the right especially at low power lev-
els. The RF3110 is insensitive to a change in input
power and the burst timing is constant and requires no
software compensation.
Switching transients occur when the up and down
ramp of the burst is not smooth enough or suddenly
changes shape. If the control slope of a PA has an
inflection point within the output power range or if the
slope is simply to steep it is difficult to prevent switch-
ing transients. Controlling the output power by chang-
ing the collector voltage is as earlier described based
on the physical relationship between voltage swing and
output power. Furthermore all stages are kept con-
stantly biased so inflection points are nonexistent.
Rev A0 010921
RF3110
Harmonics are natural products of high efficiency
power amplifier design. An ideal class “E” saturated
power amplifier will produce a perfect square wave.
Looking at the Fourier transform of a square wave
reveals high harmonic content. Although this is com-
mon to all power amplifiers, there are other factors that
contribute to conducted harmonic content as well. With
most power control methods a peak power diode
2
detector is used to rectify and sense forward power.
Through the rectification process there is additional
squaring of the waveform resulting in higher harmon-
ics. The RF3110 address this by eliminating the need
for the detector diode. Therefore the harmonics com-
ing out of the PA should represent the maximum power
of the harmonics throughout the transmit chain. This is
based upon proper harmonic termination of the trans-
mit port. The receive port termination on the T/R switch
as well as the harmonic impedance from the switch
itself will have an impact on harmonics. Should a prob-
lem arise, these terminations should be explored.
The RF3110 incorporates many circuits that had previ-
ously been required external to the power amplifier.
The shaded area of the diagram below illustrates those
components and the following table itemizes a compar-
ison between the RF3110 Bill of Materials and a con-
ventional solution:
Component
Power Control ASIC
Directional Coupler
Buffer
Attenuator
Various Passives
Mounting Yield
(other than PA)
Total
Conventional
Solution
$0.80
$0.20
$0.05
$0.05
$0.05
$0.12
$1.27
RF3110
N/A
N/A
N/A
N/A
N/A
N/A
$0.00
Note: Output power is limited by battery voltage. The
relationship in Equation 4 does not limit output power.
Equation 4 limits VRAMP to correspond with the battery
voltage.
2-270
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