L4992 Ver la hoja de datos (PDF) - STMicroelectronics
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L4992 Datasheet PDF : 26 Pages
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L4992
ELECTRICAL CHARACTERISTICS (Continued)
Symbol
Parameter
Test Condition
Min.
HIGH AND LOW SIDE GATE DRIVER (BOTH SECTIONS)
I25, I27, Source Output Peak Current
CLOAD = 1nF
0.2
I32, I30
Sink Output Peak Current
CLOAD = 1nF
0.2
RH
RDSON Resistance (or Impedance) Driver OUT HIGH
RL
RDSON resistance (or Impedance) Driver OUT LOW
VOH
Output High Voltage
HSTRAP = REG5
4.40
ISOURCE = 10mA; HSRC = GND
VOL
Output Low Voltage
HSTRAP = REG5
ISINK = 10mA HSRC = GND
TCC
Cross-Conduction Delay
30
12V LINEAR REGULATOR SECTION
V21
Input Voltage Range
V22
Output Voltage
I22
Current Limiting
Short Circuit Current
VCP
Input Voltage Clamp
"One Shot" Activation Threshold
"One Shot" Pulse
I22 = 0 to 120mA
VREG12 = 12V
VREG12 = 0V
ICLAMP = 100µA
V13IN Falling
13
11.54
120
150
16
12.88
Typ.
0.5
0.5
5.3
75
12.0
13.7
Max.
7
5
5.61
0.5
130
20
12.48
14.52
1.5
Unit
A
A
Ω
Ω
V
V
ns
V
V
mA
mA
V
V
µs
INTERNAL REGULATOR (VREG5) AND REFERENCE VOLTAGE
V3
VREG5 Output Voltage
VIN = 5.5 to 20V
ILOAD = 0 to 5mA
I3
Total Current Capability
VREG5 = 5.3V
VREG5 = 6V
Switch-Over Threshold Voltage
V12
Reference Voltage
VIN = 5.5 to 20V
ILOAD = 1 to 5mA
I12
Source Current at Reference
Voltage
POWER GOOD AND ENABLE FUNCTION
V16, V11 RUN3, RUN5, Enable Voltage HIGH LEVEL
V16, V11 RUN3, RUN5, Disable Voltage LOW LEVEL
T10
Power Good Delay
CCRST = 100nF
T27, T30
Shutdown Delay Time before
Low Side Activation
(Except Over-Voltage Fault)
CCRST = 100nF,
CRST Timing Rate
Power Good High Level
Power Good LowLevel
SYNCHRONIZATION
IPWROK = 40µA
IPWROK = 320µA
Synchronisation Pulse Width
Synchronisation Input Voltage
(Falling Edge Transition)
4.5
5.3 5.61
V
25
70
mA
4.3 4.53 4.7
V
3.35 3.39 3.43
V
3.32 3.39 3.46
V
5
mA
2.4
V
0.8
V
160 200 240 ms
160 200 240 ms
2
ms/nF
4.1
V
0.4
V
400
ns
5
V
5/26
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