LB1876 Ver la hoja de datos (PDF) - SANYO -> Panasonic

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LB1876

Monolithic Digital IC For Polygon Mirror Motors 3-phase Brushless Motor Driver

SANYO -> Panasonic 

LB1876 Overview

LB1876

1. Speed control circuit

This IC provides high-precision, low-jitter, and stable motor rotation since it adopts a PLL speed control technique.

This PLL circuit compares the phases of the edges on the CLK signal (falling edges) and the FG signal (falling edges on

the FGIN+, FGS output) and controls the speed using that error output.

The FG servo frequency during control operation is the same as the clock frequency.

fFG(servo) = fCLK

2. Output drive circuit

To reduce power loss in the output, this IC adopts a direct PWM drive technique. The output transistors are always

saturated when on, and the motor drive power is controlled by changing the output on duty. Since the lower side

transistor is used for the output PWM switching, Schottky diodes must be inserted between the outputs and VCC. (This

is because if the diodes used do not have a short reverse recovery time, instantaneous through currents will flow when

the lower side transistor turns on.)

The diodes between the outputs and ground are built in. However, if problems (such as waveform disruption during

lower side kickback) occur for large output currents, attach external rectifying diodes or Schottky diodes. If reverse

control mode is selected for braking and problems such as incorrect operation or excess heat generation due to the

reverse recovery time of the lower side diode causes a problem, add an external Schottky diode.

3. Current control circuit

The current control circuit controls the current (limits the peak current) to the current determined by I = VRF/Rf (VRF

= 0.5V typ., Rf: current detection resistor). The limiting operation consists of reducing the output on duty to suppress

the current.

The current control circuit detects the diode reverse recovery current due to the PWM operation, and has an operating

delay (about 3µ s) to prevent incorrect current limiting operation. If the motor coils have a relatively low resistance, or

relatively low inductance, the changes in current flow at startup (the state where the motor presents no back

electromotive force) will be rapid. As a result, the current limiter may operate at currents in excess of the set current due

to this delay. In such cases, the current limit value must be set so as to take the current increase due to the delay into

account.

4. Power saving circuit

This IC goes to the power saving state, which reduces power consumption, in the stopped state. Power is reduced in the

power saving state by cutting the bias current to most of the circuit blocks in the IC. However, the 5 V regulator circuit

does operate and provide its output in the power saving state.

5. Reference clock

The externally input clock signal must be free of chattering and other noise. The input circuit does have hysteresis, but

if problems occur, the clock signal must be input through a capacitor or other noise reduction circuit.

If the IC is set to the start state with no reference clock input, and if the constraint protection circuit is operated, after the

motor rotates a certain amount, the drive will be turned off. However, if the constraint protection circuit is not operated,

and furthermore, if reverse control mode is selected during braking, the motor will run backwards at increasing speed.

A workaround will be required in this case. (This problem occurs because the constraint protection circuit oscillator

signal is used for clock cutoff protection.)

6. PWM frequency

The PWM frequency is determined by the capacitor C (F) connected to the PWM pin.

fPWM ≈ 1/(15000 × C)

If an 1800pF capacitor is used, the frequency will be about 37kHz. If the PWM frequency is too low, the motor will

emit audible switching noise, and if it is too high, the power loss will increase. A frequency in the range 15 to 50kHz is

desirable. The capacitor ground must be connected as close as possible to the IC control block ground (the GND1 pin)

to minimize the influence of the output on this circuit.

7. Hall sensor input signals

Input signals with amplitudes greater than the input circuit hysteresis (42mV maximum) must be provided to the Hall

inputs. Input amplitudes of over 100mV are desirable to minimize the influence of noise. If the output waveform is

disturbed by noise (at phase switching), insert capacitors across the input to prevent this.

No.6201-10/12

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