DS2180A Ver la hoja de datos (PDF) - Dallas Semiconductor -> Maxim Integrated
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DS2180A Datasheet PDF : 35 Pages
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DS2180A
TRANSMIT SIGNALING
When enabled (via TCR.4) channel signaling is inserted in frames 6 and 12 (193S) or in frames 6, 12, 18
and 24 (193E) in the 8th bit position of every channel word. Signaling data is sampled at TABCD on the
falling edge of TCLK during bit 8 of each input word during signaling frames. Logical combination of
clocks TMO, TSIGFR and TSIGSEL allows external multiplexing of separate serial links for A, B or A,
B, C, D signaling sources.
TTR1–TTR3: TRANSMIT TRANSPARENCY REGISTERS Figure 6
(MSB)
CH8
CH7 CH6
CH5
CH4
CH3
CH2
CH1
CH16 CH15 CH14 CH13 CH12 CH11 CH10 CH9
CH24 CH23 CH22 CH21 CH20 CH19 CH18 CH17
(LSB)
TIR1
TIR2
TIR3
SYMBOL
CH24
CH1
POSITION
TTR3.7
TTR1.0
NAME AND DESCRIPTION
Transmit Transparent Registers. Each of these bit positions
represents a DS0 channel in the outgoing frame. When set, the
corresponding channel is transparent.
TIR1–TIR3: TRANSMIT IDLE REGISTERS Figure 7
(MSB)
CH8
CH7 CH6
CH5
CH4
CH3
CH16 CH15 CH14 CH13 CH12 CH11
CH24 CH23 CH22 CH21 CH20 CH19
CH2
CH10
CH18
CH1
CH9
CH17
(LSB)
TIR1
TIR2
TIR3
SYMBOL
CH24
CH1
POSITION
TIR3.7
TIR1.0
NAME AND DESCRIPTION
Transmit Idle Registers. Each of these bit positions represents a
DS0 channel in the outgoing frame. When set, the corresponding
channel will output an idle code format determined by TCR.2.
TRANSMIT CHANNEL TRANSPARENCY
Individual DS0 channels in the T1 frame may be programmed clear (no inserted robbed bit signaling and
no bit 7 zero suppression) by setting the appropriate bits in the transmit transparency registers. Channel
transparency is required in mixed voice/data or data-only environments such as ISDN, where data
integrity must be maintained.
TRANSMIT IDLE CODE INSERTION
Individual outgoing channels in the frame can be programmed with idle code by asserting the appropriate
bits in the transmit idle registers. One of two idle code formats, 7F (Hex) and FF (Hex) may be selected
by the user via TCR.3. If enabled, robbed bit signaling data is inserted into the idle channel, unless the
appropriate TTR bit is set for that channel. This feature eliminates external hardware currently required to
intercept and stuff unoccupied channels in the DS1 bit stream.
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