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SMJ28F010B Ver la hoja de datos (PDF) - Austin Semiconductor

Número de pieza
componentes Descripción
Fabricante
SMJ28F010B
Austin-Semiconductor
Austin Semiconductor Austin-Semiconductor
SMJ28F010B Datasheet PDF : 23 Pages
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operation
Table 1 lists the modes of operation for the device.
SMJ28F010B
131072 BY 8-BIT
FLASH MEMORY
SGMS738 – APRIL 1998
Table 1. Operation Modes
FUNCTION†
MODE
VPP
E
G
A0
A9
W
(1)
(22)
(24)
(12)
(26)
(31)
DQ0 – DQ7
(13 – 15, 17 – 21)
Read
VPPL
VIL
VIL
X
X
VIH
Data Out
Output Disable
VPPL
VIL
VIH
X
X
VIH
Hi-Z
Standby and Write Inhibit
Read
VPPL
VIH
X
X
X
X
Hi-Z
Algorithm-Selection Mode VPPL
VIL
VIL
VIL
VID
Manufacturer-Equivalent
VIH
Code 89h
VIH
Device-Equivalent Code B4h
Read
VPPH
VIL
VIL
X
X
VIH
Data Out
Read / Output Disable
VPPH
VIL
VIH
X
X
VIH
Hi-Z
Write Standby and Write Inhibit
VPPH
VIH
X
X
X
X
Hi-Z
Write
VPPH
VIL
VIH
X
X
VIL
Data In
X can be VIL or VIH.
VPPL VCC + 2 V; VPPH is the programming voltage specified for the device. For more details, see the recommended operating conditions.
read/ output disable
When the outputs of two or more SMJ28F010B devices are connected in parallel on the same bus, the output
of any particular device in the circuit can be read with no interference from the competing outputs of other
devices. Reading the output of the SMJ28F010B is enabled when a low-level signal is applied to the E and G
pins. All other devices in the circuit must have their outputs disabled by applying a high-level signal to one of
these pins.
standby and write inhibit
Active ICC current can be reduced from 30 mA to 1 mA by applying a high TTL level on E or to 100 µA with a
high CMOS level on E. In this mode, all outputs are in the high-impedance state. The SMJ28F010B draws active
current when it is deselected during programming, erasure, or program / erase verification. It continues to draw
active current until the operation is terminated.
algorithm-selection mode
The algorithm-selection mode provides access to a binary code identifying the correct programming and erase
algorithms. This mode is activated when A9 ( pin 26) is forced to VID. Two identifier bytes are accessed by
toggling A0. All other addresses must be held low. A0 low selects the manufacturer-equivalent code 89h, and
A0 high selects the device-equivalent code B4h, as shown in Table 2.
Table 2. Algorithm-Selection Modes
IDENTIFIER§
A0
DQ7
DQ6
DQ5
Manufacturer-Equivalent Code
VIL
1
0
0
Device-Equivalent Code
VIH
1
0
1
§ E =VIL, G = VIL, A1 – A8 = VIL, A9 = VID, A10 – A16 = VIL, VPP = VPPL.
PINS
DQ4
DQ3
0
1
1
0
DQ2
0
1
DQ1
0
0
DQ0
1
0
HEX
89
B4
POST OFFICE BOX 1443 HOUSTON, TEXAS 77251–1443
5

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