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P83C591 Ver la hoja de datos (PDF) - Philips Electronics

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P83C591 Datasheet PDF : 160 Pages
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Philips Semiconductors
Single-chip 8-bit microcontroller with CAN controller
Preliminary Specification
P8xC591
6.2 Pin description
Table 1 Pin description for QFP44/PLCC44, see Note 1.
SYMBOL
RST
P3.0to P3.7
PIN
QFP44 PLCC44
DESCRIPTION
4
10
Reset: A Input to reset the P8xC591. It also provides a reset pulse as output
when Timer T3 overflows.
Port 3 (P3.0 to P3.7): 8-bit programmable I/O port lines; Port 3 can
sink/source 4 LSTTL inputs.
Port 3 pins serve alternate functions as follows:
P3.0/RXD
5
11
RXD: Serial input port for UART;
T2: T2 event input
P3.1/TXD
7
13
TXD: Serial output port for UART;
RT2: T2 timer reset signal. Rising edge triggered.
P3.2/INT0/CMSR0 8
14
INT0: External interrupt input 0;
CMSR0: Compare and Set/Reset output for Timer T2.
P3.3/INT1/
CMSR1
9
15
INT1: External interrupt input 1;
CMSR1: Compare and Set/Reset output for Timer T2.
P3.4/T0/CMSR2 10
16
T0: Timer 0 external interrupt input;
CMSR2: Compare and Set/Reset output for Timer T2.
P3.5/T1/CMSR3 11
17
T1: Timer 1 external interrupt input;
CMSR3: Compare and Set/Reset output for Timer T2.
P3.6/WR
12
18
WR: External Data Memory Write strobe;
P3.7/RD
13
19
RD: External Data Memory Read strobe.
During reset, Port 3 will be asynchronously driven resistive HIGH.
XTAL2
XTAL1
VSS
VDD
Port 3 has four modes selected on a per bit basis by writing to the P3M1 and
P3M2 registers as follows:
P3M1.x P3M2.x Mode Description
0
0 Pseudo-bidirectional (standard c51 configuration default)
0
1 Push-Pull
1
0 High impedance
1
1 Open drain
14
20
Crystal pin 2: output of the inverting amplifier that forms the oscillator. Left
open-circuit when an external oscillator clock is used.
15
21
Crystal pin 1: input to the inverting amplifier that forms the oscillator, and
input to the internal clock generator. Receives the external oscillator clock
signal when an external oscillator is used.
16
22
Ground; circuit ground potential.
17
23
Power supply; power supply pin during normal operation and power
reduction modes.
2000 Jul 26
9

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