DatasheetQ Logo
Electronic component search and free download site. Transistors,MosFET ,Diode,Integrated circuits

P83C591 Ver la hoja de datos (PDF) - Philips Electronics

Número de pieza
componentes Descripción
Fabricante
P83C591 Datasheet PDF : 160 Pages
First Prev 11 12 13 14 15 16 17 18 19 20 Next Last
Philips Semiconductors
Single-chip 8-bit microcontroller with CAN controller
Preliminary Specification
P8xC591
SYMBOL
PIN
QFP44 PLCC44
DESCRIPTION
P1.0 to P1.4
P1.5 to P1.7
40 to 44 2 to 6
1 to 3 7 to 9
Port 1: 8-bit I/O port with a user configurable output type. The operation of
Port 1 pins as inputs or outputs depends upon the port configuration selected.
Each port pin is configured independently.
P1.0
P1.1
P1.2 to P1.4
40
2
41
3
42 to 44 4 to 6
Port 1 also provides various special functions as described below:
RXDC: CAN Receiver input line.
TXDC: CAN Transmit output line.
During reset, Port P1.0 and P1.1 will be asynchronously driven resistive
HIGH, P1.2 to P1.7 is High-Impedance (Tri-state).
CT0I/INT2 / CT1I/INT3 / CT2I/INT4: T2 Capture timer inputs or External
Interrupt inputs.
ADC0 to ADC2: Alternate function: Input channels to ADC.
P1.5 to P1.7
P1.5
P1.6
P1.7
1 to 3
1
2
3
7 to 9
7
8
9
ADC3 to ADC5: Input channels to ADC:
CT3I/INT5: T2 Capture timer input or External Interrupt inputs.
SCL: Serial port clock line I2C. Push-pull or pseudo bidrectional modes is not
implemented at I2C.
SDA: Serial data clock line I2C.Push-pull or pseudo bidrectional modes is not
implemented at I2C.
PWM0
PWM1
Port 1 has four modes selected on a per bit basis by writing to the P1M1 and
P1M2 registers as follows:
P1M1.x P1M2.x Mode Description
0
0 Pseudo-bidirectional (standard c51 configuration default
0
1
(2))
1
0 Push-Pull (2)
1
1 High impedance Open drain
Port 1 is also used to input the lower order address byte during EPROM
programming and verification. A0 is on P1.0, etc.
6
12
Pulse Width Modulation: Output 0.
28
34
Pulse Width Modulation: Output 1.
Notes
1. To avoid “latch-up” effect as power-on, the voltage on any pin at any time must not be higher or lower than VDD +0.5 V
or VSS 0.5 V.
2. Not implemented for P1.6 and P1.7.
2000 Jul 26
11

Share Link: 

datasheetq.com  [ Privacy Policy ]Request Datasheet ] [ Contact Us ]