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MK3230-01S Ver la hoja de datos (PDF) - Integrated Circuit Systems

Número de pieza
componentes Descripción
Fabricante
MK3230-01S
ICST
Integrated Circuit Systems ICST
MK3230-01S Datasheet PDF : 4 Pages
1 2 3 4
I CR O C LOC K
MK3230
Portable System Clock Synthesizer
Electrical Specifications
Parameter
Conditions
ABSOLUTE MAXIMUM RATINGS (note 1)
Minimum Typical Maximum Units
Supply Voltage, VDD
Referenced to GND
7
V
Inputs and Clock Outputs
Referenced to GND
-0.5
VDD+0.5
V
Ambient Operating Temperature
0
70
°C
Soldering Temperature
Max of 30 seconds
260
°C
Storage Temperature
DC CHARACTERISTICS
-65
150
°C
Operating Voltage, VDD
3.0
5.5
V
Operating Voltage,VDD32
2.0
5.5
V
Input High Voltage, VIH
VDD=5V
2.0
V
Input Low Voltage, VIL
VDD=5V
0.8
V
Output High Voltage, VOH
VDD=5V, IOH=-25mA 2.4
V
Output Low Voltage, VOL
VDD=5V, IOL=25mA
0.4
V
Input High Voltage, VIH
VDD=3.3V
1.9
V
Input Low Voltage, VIL
VDD=3.3V
0.4
V
Output High Voltage, VOH
VDD=3.3V, IOH=-8mA 2.4
V
Output Low Voltage, VOL
VDD=3.3V, IOL=8mA
0.4
V
IDD Operating Supply Current, 5V
No Load, 80MHz
25
mA
IDD32 with only 32 kHz running, 5V
No Load
3.5
µA
IDD Operating Supply Current, 3.3V
No Load, 80MHz
15
mA
IDD32 with only 32 kHz running, 3.3V
No Load
2.5
µA
Short Circuit Current, 5V
32 kHz output
±30
mA
Short Circuit Current, 5V
Each MHz output
±100
mA
Input Capacitance
7
pF
Internal Crystal Capacitance
AC CHARACTERISTICS
Pins 2, 3 only
15
pF
Input Frequency
32.768
kHz
Output Clock Rise and Fall Time, 0.2 to 0.8VDD
2
ns
Output Clock Duty Cycle, all MHz clocks
At VDD/2
45
49 to 51
55
%
32.768 kHz Clock Duty Cycle
At VDD32/2
57
%
Absolute Clock Period Jitter, CPU clock
25 to 80 MHz
-500
500
ps
Power up time, CPU off to 80 MHz, 32k running VDD=3.3 or 5V
9
ms
Transition time, 4 MHz to 80 MHz
VDD=3.3 or 5V
4
ms
Transition time, 80 MHz to 4 MHz
VDD=3.3 or 5V
2.5
ms
Power on time,VDD32=0V to all clocks stable 32.768kHz crystal with ESR 25k
500
750
ms
Note 1: Stresses beyond those listed under Absolute Maximum Ratings could cause permanent damage to the device. Prolonged
exposure to levels above the operating limits but below the Absolute Maximums may affect device reliability.
Note on the 14.32 MHz output : The actual output frequency from this clock is 14.3196 MHz, versus
14.31818 MHz that has been traditional. This output can be used as the input to digital chips providing
functions such as timing or keyboard, but it should NOT be used to drive a graphics PLL that is used for a
CRT display. Instead, use a 14.318MHz crystal as the input to the CRT graphics device.
MDS 3230 F
3
Revision 022798
Printed 11/16/00
Integrated Circuit Systems, Inc.•525 Race Street•San Jose•CA•95126•(408)295-9800tel•www.icst.com

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