TN1215-1000B Ver la hoja de datos (PDF) - STMicroelectronics
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TN1215-1000B Datasheet PDF : 11 Pages
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TN12, TS12 and TYNx12 Series
Figure 9: Relative variation of dV/dt immunity
versus gate-cathode resistance (typical
values) for TS8 series
dV/dt[RGK] / dV/dt[RGK=220Ω]
10.0
Tj = 125°C
VD = 0.67 x VDRM
1.0
0.1
0
RGK(kΩ)
200
400
600
800
1000
1200
Figure 10: Relative variation of dV/dt immunity
versus gate-cathode capacitance (typical
values) for TS8 series
dV/dt[CGK] / dV/dt[RGK=220Ω]
4.0
VD = 0.67 x VDRM
3.5
Tj = 125°C
RGK = 220Ω
3.0
2.5
2.0
1.5
1.0
0.5
CGK(nF)
0.0
0
25
50
75
100
125
150
Figure 11: Surge peak on-state current versus
number of cycles
Figure 12: Non-repetitive surge peak on-state
current for a sinusoidal pulse with width
tp < 10 ms, and corresponding values of I²t
ITSM(A)
150
140
130
120
110
100
90
80
70
TS12
60
50
40
30
20
Repetitive
TC=105°C
10
0
1
TN12 / TYN12
Non repetitive
Tj initial=25°C
Number of cycles
10
100
tp=10ms
One cycle
1000
ITSM(A), I2t (A2s)
2000
1000
100
dI/dt limitation
ITSM
TS12
Tj initial = 25°C
TN12 / TYN12
TN12 / TYN12
I2t
TS12
10
0.01
tp(ms)
0.10
1.00
10.00
Figure 13: On-state characteristics (maximum
values)
ITM(A)
200
100
Tj max.:
Vt0=0.85V
Rd=30mΩ
Tj=max
10
Tj=25°C
VTM(V)
1
0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0
Figure 14: Thermal resistance junction to
ambient versus copper surface under tab
(epoxy printed circuit board FR4, copper
thickness: 35µm) (DPAK and D2PAK)
Rth(j-a)(°C/W)
100
80
60
DPAK
40
D2PAK
20
S(cm²)
0
0
2
4
6
8 10 12 14 16 18 20
5/11
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