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LC895925

Signal Processing LSI for CD-R Drives

SANYO -> Panasonic 

Ordering number : EN*5784

CMOS LSI

LC895925

Signal Processing LSI for CD-R Drives

Preliminaly

Overview

The LC895925 provides the following signal processing

functions for CD-R drives: CD-ROM decoding/encoding

(complete with ECC processing for the former), subcode

decoding/encoding, CD encoding, ATIP decoding, CLV

servo, and SCSI interface registers.

Features

• CD-ROM decoding/encoding complete with error

detection and error correction

• Subcode decoding/encoding complete with error

correction

• ATIP decoding and CRC checking for both encoding

and decoding

• CLV servo control using ATIP data during encoding

• CIRC code insertion and EFM modulation during

encoding

• Support for PCA random EFM output during encoding

• Support for CD-ReWritable (CD-RW) Write Strategy

signal output

• Access to buffer RAM from microcontroller via

LC895925

• Built-in SCSI interface

• Speeds of 12× for decoding and 4× for encoding

— Frequencies

Decoding: 17.2872 MHz

Encoding: 17.2872 MHz without Write Strategy

support

69.1488 MHz with Write Strategy

support

• Transfers speeds of 10 megabytes/s (synchronous) and 5

megabytes/s (asynchronous) with 16 80-ns DRAMs *1

• Buffer RAM sizes between 1 and 32 megabits (using 16-

bit DRAMs)

• User control over sizes of CD main channel, C2 flag,

and subcode areas in buffer RAM

• Built-in batch transfer function for transferring entire

CD main channel, C2 flag, or subcode area in a single

operation

• Built-in multiblock transfer function for transferring

multiple blocks in a single operation

Notes:

1. Using a SCSI master clock of 20 MHz with speeds up

to 8×.

2. Using a SCSI master clock of 17.2872 MHz with

speeds up to 4×.

Package Dimensions

unit: mm

3153A-QFP160E

[LC895925]

SANYO: QIP160E

SANYO Electric Co.,Ltd. Semiconductor Bussiness Headquarters

TOKYO OFFICE Tokyo Bldg., 1-10, 1 Chome, Ueno, Taito-ku, TOKYO, 110-0005 JAPAN

D1997RM (OT) No. 5784-1/7

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