DatasheetQ Logo
Electronic component search and free download site. Transistors,MosFET ,Diode,Integrated circuits

ML6510CQ-80 Ver la hoja de datos (PDF) - Micro Linear Corporation

Número de pieza
componentes Descripción
Fabricante
ML6510CQ-80
Micro-Linear
Micro Linear Corporation Micro-Linear
ML6510CQ-80 Datasheet PDF : 18 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
ML6510
ADAPTIVE DESKEW BUFFERS
Each copy of the clock is driven by an adaptive deskew
buffer. The deskew buffer compensates for skew time
automatically in accordance to the flight time delay it
senses from the reflection on the transmission line.
Figure 4 shows the simplified functional block diagram of
the deskew circuit. The phase of the sense signal and the
driver signal is presented to a three-input phase
comparator and compared with the reference signal. The
phase comparator then controls the voltage controlled
delay in the output drive line to match the delay of the
fixed reference delay line. Therefore, the sum of the delay
of the driver circuit, PCB trace delay, rise time delay at the
load and the adjustable delay will always equal the fixed
maximum delay.
The sense circuit has an internal level detect such that any
skew caused by loading is also accounted for. Since the
delay of the circuit is matched for the entire loop, the
phase of all the drivers are in close alignment at the inputs
of the load.
CLOCK IN
FIXED
MAX
DELAY
PHASE
DETECTOR
SENSE
LOAD CONDITIONS
The ML6510 has been designed to drive the wide range of
load conditions that are encountered in a high frequency
system. The eight output clock loads can each vary within a
range of trace length and lumped capacitive load, and the
ML6510 will maintain the low skew characteristics specified
in Electrical Characteristics. The clock skew can be further
minimized by providing some first-order matching
between any two loads that require particularly well-
matched clocks.
The ML6510-80 produces a 5V swing at the load and
requires a single external termination resistor for each
output. The ML6510-130 produces a 3V swing at the load
and requires two external termination resistors for each
output. The FB input pin is connected to the other side of
the termination resistor R1 or R2, with a short connection.
Termination resistor valves should be chosen as follows:
R1= Z0 R2 = 1.5 × Z0 R3 = 3 × Z0
TRACE
IMPEDANCE
Z0
40
50
63
RESISTOR
VALUES
R1
R2
R3
40
60
120
50
75
150
63
95
189
VOLTAGE
CONTROLLED
DELAY
DRIVE
LOAD
Figure 4. Deskew Circuit Block Diagram.
10

Share Link: 

datasheetq.com  [ Privacy Policy ]Request Datasheet ] [ Contact Us ]