BU9877FV Ver la hoja de datos (PDF) - ROHM Semiconductor

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componentes Descripción

Fabricante

BU9877FV

Serial interface IC for DIMMs supporting plug & play

ROHM Semiconductor 

Memory ICs

(10) Timing charts

Start condition

1

SCL

89

17 18

BU9877FV

Stop condition

26 27

SDA

1

0

1

0 A2 A1 A0 0

WA7 WA6

WA0

D7

D0

Slave address

Word address

Write data

ACK signal (output)

Fig. 7 Byte write cycle

• Data is written to the address specified by the word address (n address).

• After 8 bits of data are input, a stop bit is generated. This initiates writing of the data to the memory cell.

Start condition

Stop condition

1

SCL

8

9

18

SDA

1

0

1

0 A2 A1 A0 1

D7 D6 D5

D2 D1 D0 1

Slave address

ACK signal (output)

Fig. 8 Current read cycle

Read data

ACK signal (input)

• This IC has an internal circuit address counter to store the previously accessed address in the memory. If the pre-

vious command was a write command, the write word address data (n) is read, and if the previous command was

a read command, the read word address data (n) incremented by one address (n + 1) is read.

• If the ACK signal LOW following D0 is detected and no stop condition is sent from the master side, reading can be

continued sequentially to the next data.

7

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