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MK68564 Ver la hoja de datos (PDF) - STMicroelectronics

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MK68564
ST-Microelectronics
STMicroelectronics ST-Microelectronics
MK68564 Datasheet PDF : 46 Pages
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MK68564
SIO PIN DESCRIPTION (continued)
RxCA, RxCB :
TxCA, TxCB :
RTSA, RTSB :
DTRA, DTRB :
SYNCA, SYNCB :
Receiver Clocks (input/output). Programmable pin, receive clock input, or baud rate
generator output. The inputs are Schmit-trigger buffered to allow slow rise-time input
signals.
Transmitter Clocks (input/output). Programmable pin, transmit clock input, or baud rate
generator output. The inputs are Schmit-trigger buffered to allow slow rise-time input
signals.
Request to Send (outputs, active low). These outputs follow the inverted state
programmed into the RTS bit. When the RTS bit is reset in the asynchronous mode, the
output will not change until the character in the transmitter is completely shifted out.
These pins may be used as general purpose outputs.
Data Terminal Ready (outputs, Active low). These outputs follow the inverted state
programmed into the DTR bit. These pins may also be used as general purpose
outputs.
Synchronization (input/output, active low). The SYNC pin is an output when Monosync,
Bisync, or SDLC mode is programmed. It is asserted when a sync/flag character is
detected by the receiver. The SYNC pin is a general purpose input in the Asynchronous
mode and an input to the receiver in the External Sync Mode.
Figure 1a : Dual In Line Pin Configuration.
Figure 1b : Chip Carrier Pin Configuration.
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