BU9729K Ver la hoja de datos (PDF) - ROHM Semiconductor

Número de pieza

componentes Descripción

Fabricante

BU9729K

Segment-type LCD driver

ROHM Semiconductor 

Standard ICs

BU9729K

•Pin descriptions

Pin name Pin No. I / O

Function

OSC1

1

OSC2

2

These are the I / O pins for the internal oscillator.

I

Resistance should be connected between the pins when the internal clock is operating.

O

When an external clock is operating, input should be done from OSC1, and OSC2 should be left open.

VSS

3

—

This is the VSS pin.

VC

4

VLCD

5

This is the power supply pin for LCD drive.

—

The condition VLCD м VC м VSS must be satisfied.

VDD

6

—

This is the VDD pin.

SCK

7

This is the shift lock input pin for serial data.

I

The contents of the SD pin are read one bit at a time at the rising edge of this pin.

This is the serial data input pin.

SD

8

I

Display data and commands are input here.

When this is “0”, display data is not displayed, and when “1”, the data is displayed.

This is the chip select signal input pin.

CS

9

I

When this is LOW, SD input can be received.

The SCK counter is incremented at the timing at which CS goes from HIGH to LOW.

This is the signal input which recognizes whether the SD input consists of commands or display data.

C/D

10

I

When the SCK of the eighth clock rises, this pin judges the input to be display data if the

level is LOW, and a command if the level is HIGH.

COM1

These are the common output pins for LCD drive.

~

11 ~ 14

O

They are connected to the commons of the LCD panel.

COM4

SEG1

These are the segment output pins for LCD drive.

~

15 ~ 32

O

They are connected to the segments of the LCD panel.

SEG18

•Absolute maximum ratings (Ta = 25°C, VSS = 0V)

Parameter

Symbol

Limits

Unit

Power supply voltage 1

VDD

– 0.3 ~ + 7.0

V

Power supply voltage 2

VLCD

– 0.3 ~ + 7.0∗1

V

Power dissipation

Pd

400∗2

mW

Operating temperature

Topr

– 20 ~ + 75

°C

Storage temperature

Tstg

– 55 ~ + 125

°C

Input voltage

VIN

– 0.3 ~ VDD + 0.3

V

Output voltage

VOUT

– 0.3 ~ VDD + 0.3

V

∗1 The condition VLCD м VC м VSS must be satisfied.

∗2 Reduced by – 4.0mW for each increase in Ta of 1°C over 25°C.

3

Share Link: