TZA3030U Ver la hoja de datos (PDF) - Philips Electronics
Número de pieza
componentes Descripción
Fabricante
TZA3030U Datasheet PDF : 20 Pages
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Philips Semiconductors
SDH/SONET STM1/OC3 optical receiver
Objective specification
TZA3030
PINNING
SYMBOL PIN
TYPE
DESCRIPTION
AGND
1 ground
analog ground
VCCA
AGND
2 supply
3 ground
analog supply voltage
analog ground
DREF
VCCA
AGND
4 analog output bias voltage for PIN diode (VCCA); cathode should be connected to this pin
5 supply
analog supply voltage
6 ground
analog ground
IPhoto
7 analog input current input; connect the anode of PIN diode to this pin; DC bias level is
1048 mV
AGND
8 ground
analog ground
AGND
9 ground
analog ground
BWC
10 analog input bandwidth control pin; default bandwidth is 120 MHz; a resistor should be
connected between Vref (pin 11) and BWC (pin 10) to decrease bandwidth, or
between BWC (pin 10) and AGND to increase bandwidth
Vref
SUB
11 analog output band gap reference voltage; nominal value approximately 1.2 V
12 substrate
substrate pin; to be connected to AGND
DGND
13 ground
digital ground
RFTEST
14 analog input test pin; not connected; not used in application
OUTSEL
15 CMOS input output select pin; when OUTSEL is HIGH, CML data outputs are active and
PECL data outputs are disabled; OUTSEL is pulled LOW if left unconnected,
PECL data outputs will then be active and CML data outputs disabled
DGND
16 ground
digital ground
VCCD
OUTCML
17 supply
digital supply voltage
18 CML output CML data output; OUTCML goes HIGH when current flows into IPhoto (pin 7)
OUTQCML 19 CML output CML compliment of OUTCML (pin 18)
VCCD
DGND
20 supply
21 ground
digital supply voltage
digital ground
OUTPECL 22 PECL output PECL data output; OUTPECL goes HIGH when current flows into IPhoto (pin 7)
OUTQPECL 23 PECL output PECL compliment of OUTPECL (pin 22)
DGND
24 ground
digital ground
DGND
25 ground
digital ground
LOS
26 PECL output PECL-compatible LOS detection pin; LOS output is HIGH when the input signal
is below the user programmable threshold level
LOSQ
27 PECL output PECL compliment of LOS (pin 26)
LOSTTL
28 TTL output
CMOS-compatible LOS detection pin; the LOSTTL output is HIGH when the
input signal is below the user programmable threshold level
LOSTH
AGND
29 analog I/O
30 ground
pin for setting input threshold level; nominal DC voltage is VCCA − 1.5 V;
threshold level set by connecting an external resistor between LOSTH and
VCCA or by forcing a current into LOSTH; default value for this resistor is 400 kΩ
analog ground
AGC
31 analog I/O
AGC monitor voltage; the internal AGC circuit can be disabled by applying an
external voltage to this pin
AGND
32 ground
analog ground
1998 Aug 24
4
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