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DS21T05Z Ver la hoja de datos (PDF) - Dallas Semiconductor -> Maxim Integrated

Número de pieza
componentes Descripción
Fabricante
DS21T05Z
Dallas
Dallas Semiconductor -> Maxim Integrated Dallas
DS21T05Z Datasheet PDF : 7 Pages
1 2 3 4 5 6 7
DS21T05
the buffer can sink 200 mA, and VREF will move less than 60 mV. When all lines settle in the quiescent
state, the regulator will consume about 5 mA. When the DS21T05 is put into power-down mode by
bringing PD low, the power-down circuitry will turn off the transistors on each signal line. This will
isolate the DS21T05 from the signal lines and effectively remove it from the circuit. The power-down pin
( PD ) has an internal 50 k=pullup resistor. To place the DS21T05 into an active state, the PD pin should
be left open circuited. When installed on disk drives or RAID system components, the DS21T05 will not
affect the SCSI bus during a hot plug operation.
To ensure proper operation, both the TERMPWR1 and TERMPWR2 pins must be connected to the SCSI
bus TERMPWR line and both the VREF1 and VREF2 pins must be tied together externally. Each
DS21T05 requires a 4.7 µF capacitor connected between the VREF pins and ground. Figure 2 details a
typical SCSI bus configuration. In an 8-bit wide SCSI bus arrangement, two DS21T05s would be needed
at each end of the SCSI cable in order to terminate the 18 active signal lines. In a 16-bit wide SCSI bus
arrangement, three DS21T05’s would be needed at each end of the SCSI cable in order to terminate the
27 active signal lines.
DS21T05 BLOCK DIAGRAM Figure 1
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