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PM5352-BI Ver la hoja de datos (PDF) - PMC-Sierra

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PM5352-BI Datasheet PDF : 77 Pages
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DATA SHEET
PMC-1990421
ISSUE 2
1.5 The SONET Transmitter
PM5352 S/UNI STAR
SATURN USER NETWORK INTERFACE 155 (STAR)
Synthesizes the 155.52 MHz transmit clock from a 19.44 MHz
reference.
Provides a differential TTL serial interface (can be adapted to PECL
levels) at 155.52 Mbit/s with both line rate data (TXD+/-) and clock
(TXC+/-).
Provides a transmit frame pulse input to align the transport frames to a
system reference.
Provides a transmit byte clock (divide by eight of the synthesized line
rate clock) to provide a timing reference for the transmit outputs.
Optionally inserts register programmable APS (K1, K2) and
synchronization status (S1) bytes.
Optionally inserts path alarm indication signal (PAIS), path remote
defect indication (PRDI), line alarm indication signal (LAIS) and line
remote defect indication (LRDI).
Inserts path BIP-8 codes (B3), path far end block error (G1)
indications, line BIP-24 codes (B2), line far end block error (M1)
indications, and section BIP-8 codes (B1) to allow performance
monitoring at the far end.
Optionally inserts the section and line data communication channels
(D1-D3 or D4-12) via a 192 kbit/s (D1-D3) and 576 kbit/s (D4-D12)
serial stream.
Optionally inserts the 16 or 64 byte section trace (J0) sequence and
the 16 or 64 byte path trace (J1) sequence from internal register
banks.
Scrambles the transmitted STS-3c (STM-1) stream and inserts the
framing bytes (A1,A2).
Inserts ATM cells or POS frames into the transmitted STS-3c (STM-1)
synchronous payload envelope.
1.6 The Transmit ATM Processor
Provides idle/unassigned cell insertion.
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE 4

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