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IS61LP12836-166TQ(2004) Ver la hoja de datos (PDF) - Integrated Silicon Solution

Número de pieza
componentes Descripción
Fabricante
IS61LP12836-166TQ
(Rev.:2004)
ISSI
Integrated Silicon Solution ISSI
IS61LP12836-166TQ Datasheet PDF : 16 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
IS61LP12832
IS61LP12836
PIN CONFIGURATION
100-Pin TQFP
ISSI ®
NC
DQc1
DQc2
VDDQ
GND
DQc3
DQc4
DQc5
DQc6
GND
VDDQ
DQc7
DQc8
NC
VDD
NC
GND
DQd1
DQd2
VDDQ
GND
DQd3
DQd4
DQd5
DQd6
GND
VDDQ
DQd7
DQd8
NC
100 99 98 97 96 95 94 93 92 91 90 89 88 87 86 85 84 83 82 81
1
80
2
79
3
78
4
77
5
76
6
75
7
74
8
73
9
72
10
71
11
70
12
69
13
68
14
67
15
66
16
65
17
64
18
63
19
62
20
61
21
60
22
59
23
58
24
57
25
56
26
55
27
54
28
53
29
52
30
51
31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50
NC
DQb8
DQb7
VDDQ
GND
DQb6
DQb5
DQb4
DQb3
GND
VDDQ
DQb2
DQb1
GND
NC
VDD
ZZ
DQa8
DQa7
VDDQ
GND
DQa6
DQa5
DQa4
DQa3
GND
VDDQ
DQa2
DQa1
NC
128K x 32
PIN DESCRIPTIONS
A0, A1
A2-A16
CLK
ADSP
ADSC
ADV
BW1-BW4
BWE
Synchronous Address Inputs. These
pins must tied to the two LSBs of the
address bus.
Synchronous Address Inputs
Synchronous Clock
Synchronous Processor Address
Status
Synchronous Controller Address
Status
Synchronous Burst Address Advance
Individual Byte Write Enable
Synchronous Byte Write Enable
GW
Synchronous Global Write Enable
CE, CE2, CE2 Synchronous Chip Enable
OE
Output Enable
DQa-DQd
Synchronous Data Input/Output
MODE
Burst Sequence Mode Selection
VDD
+3.3V Power Supply
GND
Ground
VDDQ
Isolated Output Buffer Supply: +3.3V
or 2.5V
ZZ
Snooze Enable
Integrated Silicon Solution, Inc. — 1-800-379-4774
3
Rev. A
02/20/04

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