CY7C1011BV33-15ZC Ver la hoja de datos (PDF) - Cypress Semiconductor
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CY7C1011BV33-15ZC Datasheet PDF : 10 Pages
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CY7C1011BV33
Switching Characteristics[5] Over the Operating Range
1011BV33-12
1011BV33-15
Parameter
Description
Min.
Max.
Min.
Max.
Unit
READ CYCLE
tRC
Read Cycle Time
12
15
ns
tAA
Address to Data Valid
12
15
ns
tOHA
Data Hold from Address Change
3
3
ns
tACE
CE LOW to Data Valid
12
15
ns
tDOE
tLZOE
tHZOE
tLZCE
tHZCE
OE LOW to Data Valid
OE LOW to Low Z[6]
OE HIGH to High Z[6, 7]
CE LOW to Low Z[6]
CE HIGH to High Z[6, 7]
6
7
ns
0
0
ns
6
7
ns
3
3
ns
6
7
ns
tPU
CE LOW to Power-Up
0
0
ns
tPD
CE HIGH to Power-Down
12
15
ns
tDBE
Byte Enable to Data Valid
6
7
ns
tLZBE
Byte Enable to Low Z
0
0
ns
tHZBE
Byte Disable to High Z
6
7
ns
Notes:
4. Tested initially and after any design or process changes that may affect these parameters.
5. Test conditions assume signal transition time of 3 ns or less, timing reference levels of 1.5V, input pulse levels of 0 to 3.0V, and output loading of the specified
IOL/IOH and 30-pF load capacitance.
6. At any given temperature and voltage condition, tHZCE is less than tLZCE, tHZOE is less than tLZOE, and tHZWE is less than tLZWE for any given device.
7. tHZOE, tHZBE, tHZCE, and tHZWE are specified with a load capacitance of 5 pF as in part (b) of AC Test Loads. Transition is measured ±500 mV from steady-state voltage.
Document #: 38-05021 Rev. *A
Page 4 of 10
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