STV3012 Ver la hoja de datos (PDF) - STMicroelectronics
Número de pieza
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STV3012 Datasheet PDF : 8 Pages
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STV3012
The information is defined by the first edge of the
modulated pulses. During mode A, the data word
starts with the four bits for defining the sub-system
address S3, S2, S1 and S0, followed by the toggle
bit T0, and seven bits G, F, E, D, C, B and A, which
are defined by the selected key. During mode B,
the data word starts with the Toggle bits T1 and T0,
followed by three bits for defining the sub-system
address S2, S1 and S0, and six bits F, E, D, C, B
and A which are defined by the selected key.
The toggle bits function as an indication for the
decoder that the next instruction has to be consid-
ered as a new command.
The REMO output is protected against "lock-up",
i.e. the length of an output pulse is limited to
< 1msec, even if the oscillator stops during an
output pulse. This avoids the rapid discharge of the
battery that would otherwise be caused by the
continuous activation of the LED.
Table 1 : Key Codes
Matrix
Drive
Matrix
Sense
Code
G** F E D C B A
DRV0N
DRV1N
DRV2N
DRV3N
DRV4N
DRV5N
DRV6N
VSS
DRV0N to VSS
DRV0N to VSS
DRV0N to VSS
DRV0N to VSS
DRV0N to VSS
DRV0N to VSS
DRV0N to VSS
SEN0N
SEN0N
SEN0N
SEN0N
SEN0N
SEN0N
SEN0N
SEN0N
0000000
0000001
0000010
0000011
0000100
0000101
0000110
0000111
SEN1N
0001
*
SEN2N
0010
*
SEN3N
0011
*
SEN4N
0100
*
SEN5N
0101
*
SEN6N
0110
*
SEN5N and SEN6N 0 1 1 1
*
* The C, B and A codes are identical to SEN0N as given above.
** Bit position G only available in mode A.
Matrix
Position
0
1
2
3
4
5
6
7
8 to 15
16 to 23
24 to 31
32 to 39
40 to 47
48 to 55
56 to 63
Table 2 : Transmission Mode and Sub-system Address Selection
Mode
Sub-system Address
Driver DRVnN for n =
#
S3
S2
S1
S0
0
1
2
3
4
5
6
M
0
0
0
0
0
O
1
0
0
1
0
X
X
X
X
X
O
D
2
0
1
1
0
X
X
X
X
O
E
3
0
0
0
1
X
X
X
O
A
4
0
1
0
1
X
X
O
5
0
0
1
1
X
O
6
0
1
1
1
O
0
1
1
1
O
M
1
0
0
0
O
O
O
D
2
0
0
1
X
O
O
E
3
0
1
0
X
X
O
O
B
4
0
1
1
X
X
X
O
O
5
1
0
0
X
X
X
X
O
O
6
1
0
1
X
X
X
X
X
O
O
O
= connected to ADRM
blank = not connected to ADRM
X
= don’t care
The sub-system address and the transmission mode are defined by connecting the ADRM input to one or more driver outputs (DRV0N to
DRV6N) of the key matrix. If more than one driver is connected to ADRM, they must be decoupled by diodes.
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