MS87V1021 Ver la hoja de datos (PDF) - Oki Electric Industry
Número de pieza
componentes Descripción
Fabricante
MS87V1021 Datasheet PDF : 63 Pages
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1Semiconductor
PEDS87V1021-01
MS87V1021
PIN DESCRIPTION
Pin No.
14
13
12
15
11
19
18
20
31
30
29
27
2
3-10,
21-23
28
26
17
24
16
1
25
32
Symbol
SI
SO
SK
CS
BUSY
XT
XT
RESET
SG
LIN
LOUT
AOUT
TEST
TEST
AMON
AIN
DVDD
DGND
MVDD
MGND
AVDD
AGND
I/O
Description
I Inputs 8-bit command or data.
O Outputs 8-bit status or data.
I Data transfer clock for SI and SO.
The SK pulse is accepted when this pin is “L”. The SK pulse is not accepted when
I this pin is “H”.
Outputs “H” level during command execution. At that time, do not input a
O command from the external microcontroller.
I Crystal oscillator connection pins. When using an external clock, input the clock
via the XT pin and leave the XT pin unconnected. When an external clock is used
O in power down mode, fix the XT pin at the GND level.
The device is reset when “L” level is input. When oscillation starts, set this pin to
“L” level until oscillation becomes stable, and set to “H” level after oscillation
I becomes stable. Data stored in the internal DRAM is cleared when “L” level is
input, while data is not erased when a reset signal is input for the purpose of
releasing the Pdwn1 mode.
O
Analog reference voltage (signal ground). Connect a 1 µF capacitor between
AGND and this pin.
Inverting input pin for internal OP amplifier. The non-inverting input pin is
I internally connected to SG.
O Output pin for internal OP amplifier
O
Output pin for playback LPF. This pin outputs playback waveforms and is
connected to the speaker driving amplifier.
I Testing pin. The TEST pin is fixed at the VDD level and the TEST pins are fixed at
the GND level.
O Output pin for analog testing. Leave it unconnected.
I Input pin for analog testing. Fix it at the GND level.
—
Digital power supply pin. Connect a 0.1 µF or more bypass capacitor between
DGND and this pin.
— Digital GND pin
—
Power supply pin for DRM. Connect a 0.1 µF or more bypass capacitor between
MGND and this pin.
— Ground pin for DRAM
—
Analog power supply pin. Connect a 0.1 µF or more bypass capacitor between
AGND and this pin.
— Analog GND pin
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