STK311-050 Ver la hoja de datos (PDF) - SANYO -> Panasonic

Número de pieza

componentes Descripción

Fabricante

STK311-050

RDS/RBDS Demodulator with Synchronization and Error Correction

SANYO -> Panasonic 

STK311-050

Control Input CORR. SEL Read Timing

Normally, this pin is checked for its state. However, error

correction can be enabled/disabled at any time.

During Sync Detection

CORR. SEL is read for every bit of demodulator data from

the RDS/RBDS demodulator IC (indiated by ↓), and is read

into the LSI when 4 consecutive, matching states occur.

Figure 5. CORR. SEL read timing during sync detection

After Sync Detection

CORR. SEL is read for the head of each block of demodula-

tor data from the RDS/RDBS demodulator IC (indiated by

↓), and is read into the LSI when 4 consecutive, matching

states occur.

Figure 6. CORR. SEL read timing after sync detection

No.5024–7/8

Share Link: