STK311-050 Ver la hoja de datos (PDF) - SANYO -> Panasonic

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Fabricante

STK311-050

RDS/RBDS Demodulator with Synchronization and Error Correction

SANYO -> Panasonic 

STK311-050

Pin Functions

Pin No.

1

2

3

4

5

9

10

11

12

13

Pin name

OSC

VCC

AG

INPUT

MONI

ID-ADJ

DK-ID

SK-ID

RDS/RBDS-ID

DG

Function

VCO ceramic oscillator pin (456kHz)

Supply pin : LA2232 and LC7074 positive supply

Ground pin : LA2232 analog ground

Input pin

BPF (for adjustment) monitor output

SK detector sensitivity adjustment pin

DK signal detector indicator output.

Low-level output when an DK signal is detected, and high-level when not detected.

SK signal detector indicator output.

Low-level output when an SK signal is detected, and high-level when not detected.

RDS/RBDS signal detector indicator output.

Low-level output when an RDS/RBDS signal is detected, and high-level when not detected.

Ground pin : LC7074 digital ground

14

RESET

Reset input.

Reset restart occurs when held low for

Schmitt-trigger input.

Pull-up resistor built-in.

4 cycles.

15

CORR. SEL

Error correction selection input.

This pin selects whether the IC corrects errors in the RDS

demodulated data.

Input = 0 : No correction performed.

Input = 1 : Error correction performed.

In modes where error correction is enabled, up to five error bits are

corrected for distances of 5 bits or less.

16

DATA START

Serial data output block data start signal (D.S. CONTROL) input to

control the output waveform.

Pull-up MOS transistor (CMOS) output.

17

DATA OUT

Serial data output.

Pull-up MOS transistor (CMOS) output.

18

CLK OUT

Clock output.

Pull-up MOS transistor (CMOS) output.

19

OSC CHK

OSC1 oscillation frequency check pin

No.5024–5/8

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