STK311-050 Ver la hoja de datos (PDF) - SANYO -> Panasonic
Número de pieza
componentes Descripción
Fabricante
STK311-050 Datasheet PDF : 8 Pages
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STK311-050
Operating Characteristics at Ta = 25˚C, VCC=5V
Parameter
Symbol
Conditions
Ratings
Unit
min
typ
max
Quiescent current
Band-pass filter gain
ICCO
VGBPF
f=57kHz
f=60kHz (57kHz=0dB)
26
9
12.5
–6
–2.5
38 mA
17 dB
0 dB
Band-pass filter selectivity
f=54kHz (57kHz=0dB)
–6
–3.5
0 dB
f=38kHz (57kHz=0dB)
–39
–33 dB
PLL capture range
CR
5mVrms, CW input
–0.5
+1.1
%
RDS/RBDS detector sensitivity
Pin 12 low, input on pin 4
0.4
1.0 mVrms
SK detector sensitivity
Pin 11 low, input on pin 4
1.0
2.0 mVrms
DK detector sensitivity
Pin 10 low, input on pin 4
1.9
2.9 mVrms
RDS/RBDS input dynamic range
Pin 12 low, (ARI+RDS/RBDS) signal maximum
input on pin 4
30
50
RDS/RBDS data demodulated correctly,
RDS/RBDS signal maximum input on pin 4
250
mVrms
mVrms
DK input dynamic range
Pin 10 low, ARI signal maximum input on pin 4
75
100
mVrms
VCO free-running frequency
fOSC
High level ouput voltage
VOH
IOH=–50µA*1
IOH=–10µA*1
Low level output voltage
VOL
IOL=10mA*2
IOL=1.8mA*2
Ceramic oscillator stabilization time
tCFS See Figure 1.
Reset time
tRST
*1. DATA START, DATA OUT, CLOCK OUT
*2. RECEIVE, CORRECTION, ERROR, DATA START, DATA OUT, CLOCK OUT
453
456
VCC–1.2
VCC–0.5
See Figure 2.
459 kHz
V
V
1.5 V
0.4 V
10 ms
Figure 1. Oscillator stabilization time
Output Signal Settings
CLK OUT and DATA START output signals can be set as shown in the following table.
Setting*1
CLK OUT polarity
1
Falling edge
2
Falling edge
3
Rising edge
4
Rising edge
*1. Setting 1 is the default setting.
DATA START output
Each block
Second block only
Each block
Second block only
Figure 2. Reset time
No.5024–2/8
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