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HCS05MS

Radiation Hardened Hex Inverter with Open Drain

Intersil 

HCS05MS

September 1995

Radiation Hardened

Hex Inverter with Open Drain

Features

Pinouts

• 3 Micron Radiation Hardened SOS CMOS

• Total Dose 200K RAD (Si)

• SEP Effective LET No Upsets: >100 MEV-cm2/mg

• Single Event Upset (SEU) Immunity < 2 x 10-9 Errors/Bit-Day

(Typ)

• Dose Rate Survivability: >1 x 1012 RAD (Si)/s

• Dose Rate Upset >1010 RAD (Si)/s 20ns Pulse

• Latch-Up Free Under Any Conditions

• Military Temperature Range: -55oC to +125oC

• Significant Power Reduction Compared to LSTTL ICs

14 LEAD CERAMIC DUAL-IN-LINE

METAL SEAL PACKAGE (SBDIP)

MIL-STD-1835 CDIP2-T14, LEAD FINISH C

TOP VIEW

A1 1

Y1 2

A2 3

Y2 4

A3 5

Y3 6

GND 7

14 VCC

13 A6

12 Y6

11 A5

10 Y5

9 A4

8 Y4

• DC Operating Voltage Range: 4.5V to 5.5V

• Input Logic Levels

- VIL = 30% of VCC Max

- VIH = 70% of VCC Min

• Input Current Levels Ii ≤ 5µA at VOL, VOH

Description

The Intersil HCS05MS is a Radiation Hardened Hex inverter

function with open drain outputs. These open drain outputs can

drive into resistive loads with a separate voltage supply.

The HCS05MS utilizes advanced CMOS/SOS technology to

achieve high-speed operation. This device is a member of

radiation hardened, high-speed, CMOS/SOS Logic Family.

14 LEAD CERAMIC METAL SEAL

FLATPACK PACKAGE (FLATPACK)

MIL-STD-1835 CDFP3-F14, LEAD FINISH C

TOP VIEW

A1

Y1

A2

Y2

A3

Y3

GND

1

14

2

13

3

12

4

11

5

10

6

9

7

8

VCC

A6

Y6

A5

Y5

A4

Y4

The HCS05MS is supplied in a 14 lead Ceramic Flatpack (K suffix)

or a Ceramic Dual-In-Line Package (D suffix).

Functional Diagram

Ordering Information

Yn

An

PART

NUMBER

HCS05DMSR

HCS05KMSR

HCS05D/

Sample

HCS05K/

Sample

HCS05HMSR

TEMPERATURE SCREENING

RANGE

LEVEL

PACKAGE

-55oC to +125oC Intersil Class 14 Lead SBDIP

S Equivalent

-55oC to +125oC Intersil Class 14 Lead Ceramic

S Equivalent Flatpack

+25oC

Sample

14 Lead SBDIP

+25oC

+25oC

Sample

Die

14 Lead Ceramic

Flatpack

Die

TRUTH TABLE

INPUTS

OUTPUTS

An

Yn

L

Z (Note 1)

H (Note 2)

H

L

NOTES:

1. No pullup resistor

2. With pullup resistor

3. L = Low

4. H = High

CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.

1-888-INTERSIL or 321-724-7143 | Copyright © Intersil Corporation 1999

35

Spec Number 518829

File Number 3557.1

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