54HHSCT630CB Ver la hoja de datos (PDF) - Dynex Semiconductor
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54HHSCT630CB Datasheet PDF : 10 Pages
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54HSC/T630
Total dose radiation not
exceeding 3x105 Rad(SI)
Symbol
Parameter
Conditions
Min Typ Max Units
VDD
VIH1
VIL1
VIH2
VIL2
VOH1
VOL1
VOH2
VOL2
I1L
I1H
I2L
I2H
IDD
Supply Voltage
TTL Input High Voltage
TTL Input Low Voltage
CMOS Input High Voltage
CMOS Input Low Voltage
TTL Output High Voltage
TTL Output Low Voltage
CMOS Output High Voltage
CMOS Output Low Voltage
Input Low Current
Input High Current
IO Low Current
IO High Current
Power Supply Current
-
4.5
5.0
5.5
V
-
2.0
-
-
V
-
-
-
0.8
V
-
3.5
-
-
V
-
-
-
1.5
V
IOH = -4mA
2.4
-
IOL = 12mA (CB or DB),
-
-
IOL = 4mA (SEF or DEF)
IOH = -4mA
VDD-0.5 -
IOL = 12mA (CB or DB),
-
-
IOL = 4mA (SEF or DEF)
VDD = 5.5, VIN = VSS
-
-
VDD = 5.5, VIN = VDD
-
-
VDD = 5.5, VIN = VSS
-
-
VDD = 5.5, VIN = VDD
-
-
VDD = Max, S0 & S1 at
-
-
5.5V, All CB & DB pins
grounded, DEF & SEF
open
-
V
0.4
V
-
V
0.5
V
-10
µA
50
µA
-50
µA
50
µA
1
mA
VDD = 5V±10%, over full operating temperature range.
Mil-Std-883, method 5005, subgroups 1, 2, 3
Parameters at higher radiation levels available on request.
Table 6: Electrical Characteristics
AC ELECTRICAL CHARACTERISTICS
Parameter
From To
(Input) (Output) Min. Max. Units Conditions (HST) Conditions (HSC)
tPLH Propogation delay time, low-to-high-level output (Note 4) DB
CB
- 58
tPLH Propogation delay time, low-to-high-level output (Note 4) DB
CB
- 58
tPLH Propogation delay time, low-to-high-level output (Note 5) S1 ⇑
DEF
- 29
tPLH Propogation delay time, low-to-high-level output (Note 5) S1 ⇑
SEF
- 29
tPZH Output enable time to high level (Note 6)
S0 ⇓ CB, DB - 40
tPZL Output enable time to low level (Note 6)
S0 ⇓ CB, DB - 45
tPHZ Output disable time to high level (Note 7)
S0 ⇑ CB, DB - 45
tPLZ Output disable time to low level (Note 7)
S0 ⇑ CB, DB - 65
tS Set-up time to S1 ›
CB, DB
-
30 -
tH Hold time after S1 ›
CB, DB
-
15 -
ns S0 = 0V, S1 = 0V S0 = 0V, S1 = 0V
ns S0 = 0V, S1 = 0V S0 = 0V, S1 = 0V
ns
S0 = 3V
S0 = VDD-1V
ns
S0 = 3V
S0 = VDD-1V
ns S1 = 3V (fig. 5) S1 = VDD-1V (fig. 5)
ns S1 = 3V (fig. 4) S1 = VDD-1V (fig. 4)
ns S1 = 3V (fig. 5) S1 = VDD-1V (fig. 5)
ns S1 = 3V (fig. 4) S1 = VDD-1V (fig. 4)
ns
-
-
ns
-
-
1. VDD = 5V ±10% and CL = 50pF, over full operating temperature and total dose = 300K Rad(Si)
2. Input Pulse VSS to 3.0 Volts.(TTL), VDD -1V (CMOS).
3. Times Measurement Reference Level 1.5 Volts.
4. These parameters describe the time intervals taken to generate the check word during the memory write cycle.
5. These parameters describe the time intervals taken to flag errors during memory read cycle.
6. These parameters describe the time intervals taken to correct and output the data word and to generate and output the syndrome error code during
the memory read cycle.
7. These parameters describe the time intervals taken to disable the CB & DB buses in preparation for a new data word during the memory read cycle.
8. Mil-Std-883, method 5005, subgroups 9, 10, 11
9. Parameters at higher radiation levels available on request.
Table 7: AC Electrical Characteristics
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