SL74HC132D Ver la hoja de datos (PDF) - System Logic Semiconductor

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SL74HC132D

Quad 2-Input NAND Gate with Schmitt-Trigger Inputs High-Performance Silicon-Gate CMOS

System Logic Semiconductor 

SL74HC132

AC ELECTRICAL CHARACTERISTICS(CL=50pF,Input tr=tf=6.0 ns)

Symbol

Parameter

tPLH, tPHL Maximum Propagation Delay, Input A or B to

Output Y (Figures 1 and 2)

tTLH, tTHL Maximum Output Transition Time, Any Output

(Figures 1 and 2)

CIN

Maximum Input Capacitance

VCC

Guaranteed Limit

V 25 °C to ≤85°C ≤125°C Unit

-55°C

2.0 125

155

190

ns

4.5 25

31

38

6.0 21

26

32

2.0 75

95

110

ns

4.5 15

19

22

6.0 13

16

19

-

10

10

10

pF

Power Dissipation Capacitance (Per Gate)

CPD Used to determine the no-load dynamic power

consumption: PD=CPDVCC2f+ICCVCC

Typical @25°C,VCC=5.0 V

24

pF

Figure 1. Switching Waveforms

* Includes all probe and jig capacitance.

Figure 2. Test Circuit

SLS

System Logic

Semiconductor

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