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N74F3038N

Quad 2-input NAND 30 Ω line driver (open collector)

Philips Electronics 

Philips Semiconductors

Quad 2-input NAND 30Ω line driver (open collector)

Product specification

74F3038

FEATURES

• 30Ω line driver

• 160mA output drive capability

• High speed

• Facilitates incident wave switching

• 3nh lead inductance each on VCC and GND when both side pins

are used

DESCRIPTION

The 74F3038 is a high current Open-Collector Line Driver

composed of four 2-input NAND gates. It has been designed to deal

with the transmission line effects of PC boards which appear when

fast edge rates are used.

The 74F3038 can sink 160mA with a VCC as low as 4.5V. This

guarantees incident wave switching with VOL not more than 0.8V

while driving impedances as low as 30Ω. This is applicable with any

combination of outputs using continuous duty.

The AC specifications for the 74F3038 were determined using the

standard FAST load for open-collector parts of 50pF capacitance, a

500Ω pull-up resistor and a 500Ω pull-down resistor. (See Test

Circuit).

Reducing the load resistors to 100Ω will decrease the tPLH

propagation delay by approximately 50% while increasing tPHL only

slightly. The graph of typical propagation delay versus load resistor

(see AC Characteristics section for Graph) shows a spline fit curve

from four measured data points, RL = 30Ω, RL = 100Ω, RL = 300Ω,

and RL = 500Ω.

PIN CONFIGURATION

D0a 1

D0b 2

Q0 3

GND 4

GND 5

Q1 6

D1a 7

D1b 8

16 Q3

15 D3b

14 D3a

13 VCC

12 VCC

11 D2a

10 D2b

9 Q2

SF00570

TYPE

74F3038

TYPICAL

PROPAGATION

DELAY

6.0ns

TYPICAL

SUPPLY CURRENT

(TOTAL)

17mA

ORDERING INFORMATION

DESCRIPTION

16-pin Plastic DIP

COMMERCIAL RANGE

VCC = 5V ±10%,

Tamb = 0°C to +70°C

N74F3038N

16-pin Plastic SOL

N74F3038D

PACKAGE

DRAWING

NUMBER

SOT38-4

SOT162-1

INPUT AND OUTPUT LOADING AND FAN-OUT TABLE

PINS

DESCRIPTION

74F(U.L.)

HIGH/LOW

LOAD VALUE

HIGH/LOW

Dna, Dnb

Data inputs

1.0/1.0

20µA/0.6mA

Qn

Data outputs

OC/266

OC/160mA

NOTE: One (1.0) FAST unit load is defined as: 20µA in the High state and 0.6mA in the Low state. OC = Open Collector.

LOGIC SYMBOL

1 2 7 8 10 11 14 15

D0a D0b D1a D1a D2a D2b D3a D3b

Q0 Q1 Q2 Q3

VCC = Pin 12,13

GND = Pin 4, 5

3 6 9 16

SF00571

IEC/IEEE SYMBOL

1

&

3

2

7

6

8

10

9

11

14

15

16

SF00572

1998 May 21

2

853-0022 19433

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