VSC7226-02(2000) Ver la hoja de datos (PDF) - Vitesse Semiconductor
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componentes Descripción
Fabricante
VSC7226-02 Datasheet PDF : 2 Pages
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Quad 10Gb/s Backplane Transceiver
Gigabit
Products
VSC7226
Product Brief
Features:
• Dual Speed Operation:
- Fibre Channel: 1.06/2.12 Gb/s
- Gigabit Ethernet: 1.25 Gb/s
- 10G Ethernet: 3.125 Gb/s
- InfiniBandTM: 2.5 Gb/s
• Redundant XAUI Compliant
Serial Links
• Half-Rate Operation for
Compatibility with Legacy
1Gb/s Systems
• XGMII Compliant Parallel Data
Inputs/Outputs
• Rate Matching Between Up-
stream/Downstream VSC7226’s
• Selectable High Speed Input
Termination
• 2 Channel or 4 Channel
Aggregation Capability
• Serial Output Swing Reduction
Control
• Parallel Data Squelching Option
• Transmitter Pre-Distortion and
Receiver Equalization
• Multiple Dual Data Rate (DDR)
Clocking Options
• Extensive Per-Channel
Configuration Control
Through MDIO Interface
• Internal Serial and Parallel
Loopback Modes
• JTAG and BIST Enabled
• Optional 8B/10B
Encoder/Decoder
General Description
VSC7226 Block Diagram
The VSC7226-01 and
(Single Channel Shown)
VSC7226-02 are quad chan-
PTXEN
nel parallel-to-serial and se-
8
T(7:0)
DQ
rial-to-parallel transceiver C/D
WSEN
10
8B/10B
Encode
PTX+
PTX-
RTX+
chips designed for use in high TBC
RTX-
bandwidth data transmission KCHAR
RTXEN
between busses, backplanes
and other subsystems. Each
channel’s transmitter section
PLL
Clock
Gen
TXCLK
contains parallel 8-bit or 10-
8
bit SSTL_2 input circuitry, an R(7:0)
8B/10B encoder, serializer
IDLE
KCH
and a pair of serial PECL out- ERR
Elastic
Buffer
RXCLK
8B/10B 10
Decode
Clock/
Data
Recover
PSDET
PRX+
PRX-
RRX+
RRX-
put drivers and additional
RSDET
control inputs. Each
RRXSEL
channel’s receiver section
contains a pair of PECL inputs, clock bit characters for transmission, or may
and data recovery circuitry, a be supplied pre-encoded 10-bit data in
deserializer, an 8B/10B decoder, elas- which case the internal encoder is by-
tic buffers, 8-bit or 10-bit SSTL_2 out- passed. The four channels may oper-
put drivers and additional control out- ate independently or in a synchronized
puts. Each transmitter may be supplied mode transferring data that is word-
8-bit data which will encoded into 10- aligned across 16 or 32 data inputs
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