UPC8105GR-E1 Ver la hoja de datos (PDF) - NEC => Renesas Technology
Número de pieza
componentes Descripción
Fabricante
UPC8105GR-E1 Datasheet PDF : 16 Pages
| |||
µPC8105GR
PIN EXPLANATION
ASSIGN- SUPPLY PIN
PIN NO. MENT
VOL. (V) VOL.(V) FUNCTION AND APPLICATION
13
GND
0
14
−
Connect to the ground with
minimum inductance.
Track length should be kept as
short as possible.
15
Power
VP/S
−
Power save control pin can be
Save
controlled ON/SLEEP state with
bias as follows;
VP/S (v)
1.8 to 5.5
0 to 1.0
STATE
ON
SLEEP
16
VCC
2.7 to
−
Supply voltage pin for modulator.
5.5
Internal regulator can be kept
stable condition of supply bias
against the variable temperature
or VCC.
EQUIPMENT CIRCUIT
15
EXPLANATION OF INTERNAL FUNCTION
BLOCK
90° PHASE
SHIFTER
FUNCTION/OPERATION
Input signal from LO is send to digital
circuit of T-type flip-flop through frequency
doubler. Output signal from T-type F/F is
changed to same frequency as LO input
and that have quadrature phase shift, 0°,
90°, 180°, 270°. These circuits have
function of self phase correction to make
correctly quadrature signals.
BLOCK DIAGRAM
from LOin
×2
÷2 F/F
BUFFER AMP.
Buffer amplifiers for each phase signals to
send to each mixers.
MIXER
Each signals from buffer amp. are
quadrature modulated with two double-
I
I
balanced mixers.
High accurate phase and amplitude inputs
Q
are realized to good performance for image
Q
rejection.
ADDER
Output signals from each mixers are added
with adder and send to final amplifier.
to MODout
6
Data Sheet P10807EJ3V0DS00
Share Link: 