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TK75003 Ver la hoja de datos (PDF) - Toko America Inc

Número de pieza
componentes Descripción
Fabricante
TK75003
Toko
Toko America Inc  Toko
TK75003 Datasheet PDF : 14 Pages
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TK75003
THEORY OF OPERATION
The TK75003 is intended for use as a primary-side Pulse
Width Modulator (PWM) controller. Using a control
technique referenced in the "Application Information"
section, the TK75003 can be used as a highly cost-
effective controller for power factor correction. The many
features integrated into a simple 5-pin design allow it to be
easily configured for voltage-mode or current-mode control,
fixed-frequency or fixed off-time operation, off-line boot-
strapping, and direct drive of a power MOSFET. The
polarity of the feedback signal allows for simpler interface
with a TL431-derived error signal (see "Applications
Information" section).
fixed off-time control technique can be readily implemented
by using a small transistor to keep the timing capacitor
discharged during the on-time. When the on-pulse is
terminated, the timing capacitor ramps up to a fixed
threshold at a fixed rate to fix the off-time.
The Undervoltage Lockout (UVLO) feature with hysteresis
minimizes the start-up current which allows a low-power
boot-strap technique to be used for the housekeeping
power. The duty ratio of the TK75003 is limited to
approximately 88% by the time required to discharge the
timing ramp.
The most noteworthy integrated feature in the TK75003 is
the way in which the feedback control pin is configured to
receive the error signal and the current signal for current-
mode control. Rather than receiving both inputs into a
comparator, a single input receives both signals summed
together and compares them against a fixed internal
reference. This yields two desirable effects: 1) a current-
limit threshold is automatically established, and 2) the
required error-signal polarity is the inverse of that of a
standard two-input current-mode control system. Generally,
the signal summation requires no additional external
components and the required error-signal polarity is simpler
to achieve.
Two other functions are integrated into the feedback pin.
A current ramp, which can be used to establish either the
slope-compensation ramp for a current-mode control design
or the voltage-comparison ramp for a voltage-mode control
design, flows out of the feedback pin. By adjusting the
terminating resistance at the feedback pin, the desired
ramp magnitude is established. For overcurrent protection,
a second fixed-reference comparator monitors the feedback
pin. If the feedback pin voltage should reach the second
threshold, this indicates that cycle-by-cycle PWM control
is not sufficient for maintaining control of the current (i.e.,
the minimum duty-ratio is too large to achieve volt-second
balance in the magnetics). The overcurrent detection
comparator latches (for one cycle) a reduction in the
source current which feeds the timing capacitor. This has
the effect of reducing the switching frequency and, thus,
effectively, the minimum duty ratio, which is just what is
needed to maintain control of the current.
The switching frequency is determined by an internal
current source charging an external timing capacitor. The
timing capacitor is ramped between internally-fixed
thresholds, valley to peak, and then quickly discharged. A
Page 6
January 1999 TOKO, Inc.

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