EL7571C Ver la hoja de datos (PDF) - Elantec -> Intersil
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EL7571C Datasheet PDF : 23 Pages
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EL7571C
Programmable PWM Controller
AC Electrical Characteristics
TA = 25°C, VIN = 5V, COSC = 330pF, CSLOPE = 390pF unless otherwise specified.
Parameter
Description
Conditions
Min
Typ
Max
Unit
fOSC
fCLK
tOTEN
tSYNC
Nominal Oscillator Frequency
Clock Frequency
Shutdown Delay
Oscillator Sync. Pulse Width
COSC = 330pF
140
50
VOTEN>1.5V
Oscillator i/p (COSC) driven with HCMOS
20
gate
190
240
kHz
500
1000
kHz
100
ns
800
ns
TSTART
DMAX
Soft-start Period
Maximum Duty Cycle
VOUT = 3.5V
100/fCLK
us
97
%
Pin Descriptions
Pin No.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
Pin
Name
OTEN
CSLOPE
COSC
REF
PWRGD
VID0
VID1
VID2
VID3
VID4
FB
CS
GND
GNDP
LSD
VINP
VIN
LX
HSD
VH1
Pin
Type [1]
I
I
I
O
O
I
I
I
I
I
I
I
S
S
O
S
S
S
O
S
Function
Chip enable input, internal pull up (5mA typical). Active high.
With a capacitor attached from CSLOPE to GND, generates the voltage ramp compensation for the PWM current mode con-
troller. Slope rate is determined by an internal 14uA pull up and the CSLOPE capacitor value. VCSLOPE is reset to ground at
the termination of the high side cycle.
Multi-function pin: with a timing capacitor attached, sets the internal oscillator rate fS (kHz) = 57/COSC (µF); when pulsed
low for a duration tSYNC synchronizes device to an external clock.
Band gap reference output. Decouple to GND with 0.1uF.
Power good, open drain output. Set low whenever the output voltage is not within ±13% of the programmed value.
Bit 0 of the output voltage select DAC. Internal pull up sets input high when not driven.
Bit 1 of the output voltage select DAC. Internal pull up sets input high when not driven.
Bit 2 of the output voltage select DAC. Internal pull up sets input high when not driven.
Bit 3 of the output voltage select DAC. Internal pull up sets input high when not driven.
Bit 4 of the output voltage select DAC. Internal pull up sets input high when not driven.
Voltage regulation feedback input. Tie to VOUT for normal operation.
Current sense. Current feedback input of PWM controller and over current capacitor input. Current limit threshold set at
+154mV with respect to FB. Connect sense resistor between CS and FB for normal operation.
Ground
Power ground for low side FET driver. Tie to GND for normal operation.
Low side gate drive output.
Input supply voltage for low side FET driver. Tie to VIN for normal operation.
Input supply voltage for control unit.
Negative supply input for high side FET driver.
High side gate drive output. Driver ground referenced to LX. Driver supply may be bootstrapped to enhance low controller
input voltage operation.
Positive supply input for high side FET driver.
1. Pin designators: I = Input, O = Output, S = Supply
3
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