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HA1-4900-2(1998) Ver la hoja de datos (PDF) - Intersil

Número de pieza
componentes Descripción
Fabricante
HA1-4900-2
(Rev.:1998)
Intersil
Intersil Intersil
HA1-4900-2 Datasheet PDF : 8 Pages
1 2 3 4 5 6 7 8
HA-4900, HA-4902, HA-4905
Schematic Diagram
PR1
200k
Q3
BIAS 2
Q9D
R20D
1k
R9
4k
Q1
R1
500
R10
4k
Q11
Q2
D4B
Q4C
D45
D4A
Q4
Q5
R16
540+IN
BIAS 3 BIAS 4
BIAS 1
D9A
Q9C Q9B
Q9A
Q10
R20C R20B
R20A
R21
1k1k
1k
1k
R2
13k
Q12
D11A
Q17
R3
R4
R5
V+
1k
1k
360
R18
Q13
Q14
Q15
Q16
664
R6
2.5k
R7
2.5k
Q26
Q23
Q24 Q25
R11
8k
VLOGIC+
Q19
Q18
MN1
Q7
Q20
Q21
-IN
Q22
MN2
MN3
Q37
Q36
D35
Q38 Q28
D39
Q33
Q34
Q30
R17
19k
R14
5k
MN4
R12
Q29A 8k
Q29
D29B
R22
100
Q32
OUT
MN6
R24
14k
R15
8k
R23 MN5
100
Q31
VLOGIC-
ONE FOURTH ONLY
V-
Applying the HA-4900 Series Comparators
Supply Connections
This device is exceptionally versatile in working with most
available power supplies. The voltage applied to the V+ and V-
terminals determines the allowable input signal range; while the
voltage applied to the VL+ and VL- determines the output
swing. In systems where dual analog supplies are available,
these would be connected to V+ and V-, while the logic supply
and return would be connected to VLOGIC+ and VLOGIC-. The
analog and logic supply commons can be connected together
at one point in the system, since the comparator is immune to
noise on the logic supply ground. A negative output swing may
be obtained by connecting VL+ to ground and VL- to a negative
supply. Bipolar output swings (15VP-P, Max) may be obtained
using dual supplies. In systems where only a single logic supply
is available (+5V to 15V), V+ and VLOGIC+ may be connected
together to the positive supply while V- and VLOGIC- are
grounded. If an input signal could swing negative with respect
the V- terminal, a resistor should be connected in series with
the input to limit input current to < 5mA since the C-B junction of
the input transistor would be forward biased.
Unused Inputs
Inputs of unused comparator sections should be tied to a
differential voltage source to prevent output “chatter.”
Crosstalk
Simultaneous high frequency operation of all other channels
in the package will not affect the output logic state of a given
channel, provided that its differential input voltage is
sufficient to define a given logic state (VIN ≥ ±VOS). Low
level or high impedance input lines should be shielded from
other signal sources to reduce crosstalk and interference.
Power Supply Decoupling
Decouple all power supply lines with 0.01µF ceramic capacitors
to ground line located near the package to reduce coupling
between channels or from external sources.
Response Time
Fast rise time (<200ns) input pulses of several volts
amplitude may result in delay times somewhat longer than
those illustrated for 100mV steps. Operating speed is
optimized by limiting the maximum differential input voltage
applied, with resistor-diode clamping networks.
Typical Applications
Data Acquisition System
In this circuit the HA-4900 series is used in conjunction with
a D to A converter to form a simple, versatile, multi-channel
analog input for a data acquisition system. In operation the
processor first sends an address to the D to A, then the
processor reads the digital word generated by the
comparator outputs. To perform a simple comparison, the
processor sets the D to A to a given reference level, then
examines one or more comparator outputs to determine if
their inputs are above or below the reference. A window
comparison consists of two such cycles with 2 reference
levels set by the D to A. One way to digitize the inputs would
be for the processor to increment the D to A in steps. The D
to A address, as each comparator switches, is the digitized
level of the input. While stairstepping the D to A is slower
than successive approximation, all channels are digitized
during one staircase ramp.
4

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