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ICL7109 Ver la hoja de datos (PDF) - Intersil

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ICL7109 Datasheet PDF : 25 Pages
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ICL7109
Pin Descriptions
PIN
SYMBOL
1
GND
2
STATUS
3
POL
4
OR
5
B12
6
B11
7
B10
8
B9
9
B8
10
B7
11
B6
12
B5
13
B4
14
B3
15
B2
16
B1
17
TEST
18
LBEN
19
HBEN
20
CE/LOAD
21
MODE
22
OSC IN
23
OSC OUT
DESCRIPTION
Digital Ground, 0V. Ground return for all digital logic.
Output High during integrate and deintegrate until data is latched. Output Low when analog section
is in Auto-Zero configuration.
Polarity - HI for positive input.
Three-State Output Data Bits
Overrange - HI if overranged.
Three-State Output Data Bits
Bit 12
(Most Significant Bit)
Three-State Output Data Bits
Bit 11
High = True
Three-State Output Data Bits
Bit 10
High = True
Three-State Output Data Bits
Bit 9
High = True
Three-State Output Data Bits
Bit 8
High = True
Three-State Output Data Bits
Bit 7
High = True
Three-State Output Data Bits
Bit 6
High = True
Three-State Output Data Bits
Bit 5
High = True
Three-State Output Data Bits
Bit 4
High = True
Three-State Output Data Bits
Bit 3
High = True
Three-State Output Data Bits
Bit 2
High = True
Three-State Output Data Bits
Bit 1
(Least Significant Bit)
Three-State Output Data Bits
Input High - Normal Operation. Input Low - Forces all bit outputs high. Note: This input is used for
test purposes only. Tie high if not used.
Low Byte Enable - With Mode (Pin 21) low, and CE/LOAD (Pin 20) low, taking this pin low activates
low order byte outputs B1 through B8.
With Mode (Pin 21) high, this pin serves as a low byte flag output used in handshake mode.
See Figures 7, 8, 9.
High Byte Enable - With Mode (Pin 21) low, and CE/LOAD (Pin 20) low, taking this pin low activates
high order byte outputs B9 through B12, POL, OR.
With Mode (Pin 21) high, this pin serves as a high byte flag output used in handshake mode.
See Figures 7, 8, 9.
Chip Enable Load - With Mode (Pin 21) low. CE/LOAD serves as a master output enable. When
high, B1 through B12, POL, OR outputs are disabled.
With Mode (Pin 21) high, this pin serves as a load strobe used in handshake mode.
See Figures 7, 8, 9.
Input Low - Direct output mode where CE/LOAD (Pin 20), HBEN (Pin 19) and LBEN (Pin 18) act as
inputs directly controlling byte outputs.
Input Pulsed High - Causes immediate entry into handshake mode and output of data as in Figure 9.
Input High - Enables CE/LOAD (Pin 20), HBEN (Pin 19), and LBEN (Pin 18) as outputs, handshake
mode will be entered and data output as in Figures 7 and 8 at conversion completion.
Oscillator Input
Oscillator Output
4

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